MC9S08SH4MPJR datasheet(73/341 Pages) FREESCALE

73 / 341 page

Chapter 5 Resets, Interrupts, and General System Control

MC9S08SH8 MCU Series Data Sheet, Rev. 3

Freescale Semiconductor

5.7.4

System Options Register 1 (SOPT1)

This high page register is a write-once register so only the ﬁrst write after reset is honored. It can be read

at any time. Any subsequent attempt to write to SOPT1 (intentionally or unintentionally) is ignored to

avoid accidental changes to these sensitive settings. SOPT1 should be written during the user’s reset

initialization program to set the desired controls even if the desired settings are the same as the reset

settings.

765

1 Bit 4 is reserved, writes change the value, but will have no effect on this MCU.

3210

COPT

STOPE

IICPS

BKGDPE

RSTPE

Reset:

1100001

2 u = unaffected

POR:

11000010

LVR:

1100001u

= Unimplemented or Reserved

Figure 5-5. System Options Register 1 (SOPT1)

Table 5-6. SOPT1 Register Field Descriptions

Field

Description

7:6

COPT[1:0]

COP Watchdog Timeout — These write-once bits select the timeout period of the COP. COPT along with

COPCLKS in SOPT2 deﬁnes the COP timeout period. See Table 5-1.

STOPE

Stop Mode Enable — This write-once bit is used to enable stop mode. If stop mode is disabled and a user

program attempts to execute a STOP instruction, an illegal opcode reset is forced.

0 Stop mode disabled.

1 Stop mode enabled.

IICPS

IIC Pin Select — This bit selects the location of the SDA and SCL pins of the IIC module.

0 SDA on PTA2, SCL on PTA3.

1 SDA on PTB6, SCL on PTB7.

BKGDPE

Background Debug Mode Pin Enable — This write-once bit when set enables the PTA4/ACMPO/BKGD/MS

pin to function as BKGD/MS. When clear, the pin functions as one of its output-only alternative functions. This

pin defaults to the BKGD/MS function following any MCU reset.

0 PTA4/ACMPO/BKGD/MS pin functions as PTA4 or ACMPO.

1 PTA4/ACMPO/BKGD/MS pin functions as BKGD/MS.

RSTPE

RESET Pin Enable — This write-once bit when set enables the PTA5/IRQ/TCLK/RESET pin to function as

RESET. When clear, the pin functions as one of its alternative functions. This pin defaults to a general-purpose

input port function following a POR reset. When conﬁgured as RESET, the pin will be unaffected by LVR or other

internal resets. When RSTPE is set, an internal pullup device is enabled on RESET.

0 PTA5/IRQ/TCLK/RESET pin functions as PTA5, IRQ or TCLK.

1 PTA5/IRQ/TCLK/RESET pin functions as RESET.

MC9S08SH4MPJR Datasheet(PDF) 73 Page - Freescale Semiconductor, Inc

MC9S08SH4MPJR Datasheet(HTML) 73 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL