SI5341_16 datasheet(2/53 Pages) SILABS

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1. Features List

The Si5341/40 Rev D features are listed below:

• Generates any combination of output frequencies from any in-

put frequency

• Ultra-low jitter of 90 fs rms

• Input frequency range:

• External crystal: 25 to 54 MHz

• Differential clock: 10 to 750 MHz

• LVCMOS clock: 10 to 250 MHz

• Output frequency range:

• Differential: 100 Hz to 1028 MHz

• LVCMOS: 100 Hz to 250 MHz

• Highly configurable outputs compatible with LVDS, LVPECL,

LVCMOS, CML, and HCSL with programmable signal ampli-

tude

• Locks to gapped clock inputs

• Optional zero delay mode

• Glitchless on the fly output frequency changes

• DCO mode: as low as 0.001 ppb steps

• Core voltage

• VDD: 1.8 V ±5%

• VDDA: 3.3 V ±5%

• Independent output clock supply pins

• 3.3 V, 2.5 V, or 1.8 V

• Serial interface: I2C or SPI

• In-circuit programmable with non-volatile OTP memory

• ClockBuilder Pro software simplifies device configuration

• Si5341: 4 input, 10 output, 64-QFN 9x9 mm

• Si5340: 4 input, 4 output, 44-QFN 7x7 mm

• Temperature range: –40 to +85 °C

• Pb-free, RoHS-6 compliant

Si5341/40 Rev D Data Sheet

Features List

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SI5341 Datasheet(PDF) 2 Page - Silicon Laboratories