SI5341_16 datasheet(30/53 Pages) SILABS

Part #	SI5341

Description	Low-Jitter, 10 or 4-Output, Any-Frequency, Any-Output Clock Generator

PDF	53 Pages

Scroll/Zoom	100%

Manufacturer	SILABS [Silicon Laboratories]

Direct Link	http://www.silabs.com

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30 / 53 page

Table 5.10. SPI Timing Specifications (4-Wire)

(VDD=1.8V ± 5%, VDDA=3.3V ± 5%, TA= -40 to 85°C)

Parameter

Symbol

Min

Typ

Max

Units

SCLK Frequency

fSPI

—

MHz

SCLK Duty Cycle

TDC

—

SCLK Period

—

Delay Time, SCLK Fall to SDO Active

TD1

—

12.5

Delay Time, SCLK Fall to SDO

TD2

—

Delay Time, CSb Rise to SDO Tri-State

TD3

—

Setup Time, CSb to SCLK

TSU1

—

Hold Time, CSb to SCLK Rise

TH1

—

Setup Time, SDI to SCLK Rise

TSU2

—

Hold Time, SDI to SCLK Rise

TH2

—

Delay Time Between Chip Selects (CSb)

TCS

—

SCLK

CSb

SDI

SDO

TSU1

TD1

TSU2

TD2

TCS

TD3

TH2

TH1

Figure 5.2. 4-Wire SPI Serial Interface Timing

Si5341/40 Rev D Data Sheet

Electrical Specifications

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