SI5341_16 datasheet(42/53 Pages) SILABS

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Pin Name

Pin Number

Pin Type1

Function

Si5341

Si5340

A0/CSb

Address Select 0/Chip Select.2 This pin functions as the hard-

ware controlled address A0 in I2C mode. In SPI mode, this pin

functions as the chip select input (active low). This pin is internally

pulled up by a ~20 kΩ resistor to the voltage selected by the

IO_VDD_SEL register bit.

Control/Status

INTRb

Interrupt. 2 This pin is asserted low when a change in device sta-

tus has occurred. This interrupt has a push pull output and should

be left unconnected when not in use.

RSTb

Device Reset. 2 Active low input that performs power-on reset

(POR) of the device. Resets all internal logic to a known state and

forces the device registers to their default values. Clock outputs

are disabled during reset. This pin is internally pulled up with a

~20 kΩ resistor to the voltage selected by the IO_VDD_SEL bit.

OEb

Output Enable.2 This pin disables all outputs when held high.

This pin is internally pulled low and can be left unconnected when

not in use.

LOLb

—

Loss Of Lock.2 This output pin indicates when the DSPLL™ is

locked (high) or out-of-lock (low). An external pull up or pull down

is not needed.

—

Loss Of Lock.3 This output pin indicates when the DSPLL is

locked (high) or out-of-lock (low). An external pull up or pull down

is not needed.

LOS_XAXBb

—

Loss Of Signal.3 This output pin indicates a loss of signal at the

XA/XB pins.

SYNCb

—

Output Clock Synchronization.2 An active low signal on this pin

resets the output dividers for the purpose of re-aligning the output

clocks. For a tighter alignment of the clocks, a soft reset should be

applied. This pin is internally pulled up with a ~20 kΩ resistor to

the voltage selected by the IO_VDD_SEL bit and can be left un-

connected when not in use.

FDEC

—

Frequency Decrement Pin.2 This pin is used to step-down the

output frequency of a selected output. The affected output driver

and its frequency change step size is register configurable. This

pin is internally pulled low with a ~20 kΩ resistor and can be left

unconnected when not in use.

FINC

—

Frequency Increment Pin.2 This pin is used to step-up the out-

put frequency of a selected output. The affected output and its fre-

quency change step size is register configurable. This pin is inter-

nally pulled low with a ~20 kΩ resistor and can be left unconnec-

ted when not in use.

IN_SEL0

Input Reference Select.2 The IN_SEL[1:0] pins are used in the

manual pin controlled mode to select the active clock input. These

pins are internally pulled up with a ~20 kΩ resistor to the voltage

selected by the IO_VDD_SEL bit and can be left unconnected

when not in use.

IN_SEL1

RSVD

—

Reserved. These pins are connected to the die. Leave discon-

nected.

—

Si5341/40 Rev D Data Sheet

Pin Descriptions

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