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TNETV1647GSTZWT Datasheet(PDF) 172 Page - Texas Instruments

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Part # TNETV1647GSTZWT
Description  Digital Media System-on-Chip
PDF  236 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TNETV1647GSTZWT Datasheet(HTML) 172 Page - Texas Instruments

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PCLK
(Negative Edge Clocking)
18
20
22
HD
VD
C_FIELD
PCLK
(Positive Edge Clocking)
TMS320DM6441
SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010
www.ti.com
Table 6-56. Switching Characteristics Over Recommended Operating Conditions for
VPFE (CCD) Master Mode (see Figure 6-49)
1.05 V
1.2 V
NO.
PARAMETER
UNIT
MIN
MAX
MIN
MAX
18
td(PCLKL-HDIV)
Delay time, PCLK low to HD invalid
0.5
8
0.5
8
ns
20
td(PCLKL-VDIV)
Delay time, PCLK low to VD invalid
0.5
8
0.5
8
ns
22
td(PCLKL-C_FIELDIV)
Delay time, PCLK low to C_FIELD invalid
0.5
8.9
0.5
8.3
ns
Figure 6-49. VPFE (CCD) Master Mode Control Output Data Timing
172
Peripheral and Electrical Specifications
Copyright © 2006–2010, Texas Instruments Incorporated
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Product Folder Link(s): TMS320DM6441



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