TNETV1647GSTZWT datasheet(176/236 Pages) TI1

176 / 236 page

TMS320DM6441

SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010

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6.13.2.2 Video Encoder (VENC)

Analog/DACs interface of the video encoder (VENC) supports the following features.

•

Master clock input - 27MHz (x2 Upsampling)

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SDTV support

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Composite NTSC-M, PAL-B/D/G/H/I

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S-video (Y/C)

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Component YPbPr (SMPTE/EBU N10, Betacam, MII)

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RGB

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Non-interlace

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CGMS/WSS

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Line 21 closed caption data encoding

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Chroma low pass filter 1.5MHz/3MHz

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Programmable SC-H phase

•

HDTV support

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Progressive output (525p/625p)

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Component YPbPr

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RGB

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CGMS/WSS

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4 10-bit over-sampling D/A converters

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Optional 7.5% pedestal

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16-235/0-255 input amplitude selectable

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Programmable luma delay

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Master/slave operation

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Internal color bar generation (100%/75%)

The digital LCD controller (DLCD) of the VENC supports the following features.

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Programmable DCLK

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Various output formats

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YCbCr 16-bit

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YCbCr 8-bit

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ITU-R BT. 656

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Parallel RGB 24-bit

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Low pass filter for digital RGB output

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Programmable timing generator

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Master/slave operation

•

Internal color bar generation (100%/75%)

The VENC register memory mapping including the digital LCD and DACs is shown in Table 6-59.

176

Peripheral and Electrical Specifications

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