TNETV1647GSTZWT datasheet(124/236 Pages) TI1

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GPIx

GPOx

EXT_INTx

TMS320DM6441

SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010

www.ti.com

6.8.2

GPIO Peripheral Input/Output Electrical Data/Timing

Table 6-26. Timing Requirements for GPIO Inputs(1) (see Figure 6-19)

1.05 V and

1.2 V

NO.

UNIT

MIN

MAX

tw(GPIH)

Pulse duration, GPIx high

tw(GPIL)

Pulse duration, GPIx low

(1)

The pulse width given is sufficient to generate a CPU interrupt or an EDMA3 event. However, if a user wants to have DM6441 recognize

the GPIx changes through software polling of the GPIO register, the GPIx duration must be extended to allow DM6441 enough time to

access the GPIO register through the internal bus.

Table 6-27. Switching Characteristics Over Recommended Operating Conditions for GPIO Outputs

(see Figure 6-19)

1.05 V and 1.2 V

NO.

PARAMETER

UNIT

MIN

MAX

tw(GPOH)

Pulse duration, GPOx high

26(1)

tw(GPOL)

Pulse duration, GPOx low

26(1)

(1)

This parameter value should not be used as a maximum performance specification. Actual performance of back-to-back accesses of the

GPIO is dependent upon internal bus activity.

Figure 6-19. GPIO Port Timing

6.8.3

GPIO Peripheral External Interrupts Electrical Data/Timing

Table 6-28. Timing Requirements for External Interrupts(1) (see Figure 6-20)

1.05 V and 1.2 V

NO.

UNIT

MIN

MAX

tw(ILOW)

Width of the external interrupt pulse low

tw(IHIGH)

Width of the external interrupt pulse high

(1)

The pulse width given is sufficient to generate an interrupt or an EDMA3 event. However, if a user wants to have DM6441recognize the

GPIO changes through software polling of the GPIO register, the GPIO duration must be extended to allow DM6441 enough time to

access the GPIO register through the internal bus.

Figure 6-20. GPIO External Interrupt Timing

124

Peripheral and Electrical Specifications

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