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SPEAR600 Datasheet(PDF) 19 Page - STMicroelectronics

Part # SPEAR600
Description  Embedded MPU with dual ARM926 core, flexible memory support, powerful connectivity features and programmable LCD interface
PDF  97 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR600 Datasheet(HTML) 19 Page - STMicroelectronics

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SPEAr600
Architecture overview
Doc ID 16259 Rev 3
19/97
2.16
Fast IrDA controller
The SPEAr600 has a Fast IrDA controller.
Main features:
Supports the following standards:
IrDA serial infrared physical layer specification (IrPHY), version 1.3
IrDA link access protocol (IrLAP), version 1.1
Supports the following infrared modes and baud rates:
Serial infrared (SIR), with rates 9.6 kbps, 19.2 kbps, 38.4 kbps, 57.6 kbps and
115.2 kbps
Medium Infrared (MIR), with rates 576 kbps and 1.152 Mbps
Fast Infrared (FIR), with rate 4 Mbps
Transceiver interface compliant to all IrDA transceivers with configurable TX and RX
signal polarity
Half-duplex infrared frame transmission and reception
16-bit CRC algorithm for SIR and MIR, and 32-bit CRC algorithm for FIR
Generates preamble, start and stop flags
Uses the RZI (Return-to-Zero Inverted) modulation/demodulation scheme for SIR and
MIR, and the 4PPM (4 Pulse Position Modulation) modulation/demodulation scheme
for FIR
Provides synchronization by means of a DPLL in FIR mode
Easily adaptable to different bus systems with 32-bit register interface and FIFO with
configurable FIFO size
2.17
I2S audio block
SPEAr600 contains three I2S interfaces providing the following features.
Main features:
Conversion of AHB protocol to I2S protocol and vice versa
Supports 2.0, 2.1 and 3.1 audio outputs (I2S master mode)
32 (16L + 16R) and 64 bit (32L + 32R) of raw PCM data length supported
MIC/Line-In (2.0) recording (I2S master/slave mode)
Stereo headphone out
2.18
System controller
The System Controller provides an interface for controlling the operation of the overall
system.
Main features:
Power saving system mode control
Crystal oscillator and PLL control
Configuration of system response to interrupts



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