W39V040FAQ datasheet(22/36 Pages) WINBOND

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W39V040FA

- 22 -

Timing Waveforms for Programmer Interface Mode, continued

Chip Erase Timing Diagram

DQ[7:0]

SB2

SB1

SB0

#OE

#WE

SB3

SB4

SB5

Internal Erasure Starts

TWP

TWPH

TEC

Note: The internal address A[18:0] are converted from external Column/Row addre

Column/Row Address are mapped to the Low/High order internal addre

i.e. Column Address A[10:0] are mapped to the internal A[10:0],

Row Address A[7:0] are mapped to the internal A[18:11].

(Internal A[18:0])

Six-byte code for 3.3V-only software chip erase

5555

2AAA

5555

2AAA

5555

A[10:0]

Sector/Page Erase Timing Diagram

SB2

SB1

SB0

A[10:0]

DQ[7:0]

#OE

#WE

SB3

SB4

SB5

Internal Erase starts

Six-byte code for 3.3V-only

Sector/Page Erase

TWP

TWPH

TPEC

5555

2AAA

5555

2AAA

SA/PA

30/50

SA = Sector Address and PA = Page Address, Please ref. to the "Table of Command Definition"

Note: The internal address A[18:0] are converted from external Column/Row address

Column/Row Address are mapped to the Low/High order internal address

i.e. Column Address A[10:0] are mapped to the internal A[10:0],

Row Address A[7:0] are mapped to the internal A[18:11].

(Internal A[18:0])

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