Document Number: 002-01122 Rev.*L

Page 37 of 59

S29AS016J

Figure 12.1 Data# Polling Algorithm

Notes

1. VA = Valid address for programming. During a sector erase operation, a valid address is an address within any sector selected for erasure. During chip erase, a valid

address is any non-protected sector address.

2. DQ7 should be rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5.

12.2

RY/BY#: Ready/Busy#

The RY/BY# is a dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The

RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since RY/BY# is an open-drain output,

If the output is low (Busy), the device is actively erasing or programming. (This includes programming in the Erase Suspend mode.)

If the output is high (Ready), the device is ready to read array data (including during the Erase Suspend mode), or is in the standby

mode.

Table on page 40 shows the outputs for RY/BY#. Figures Figure 18.1 on page 44, Figure 18.2 on page 45, Figure 18.5 on page 48

and Figure 18.6 on page 48 shows RY/BY# for read, reset, program, and erase operations, respectively.

12.3

DQ6: Toggle Bit I

Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete, or whether the device

has entered the Erase Suspend mode. Toggle Bit I may be read at any address, and is valid after the rising edge of the final WE#

pulse in the command sequence (prior to the program or erase operation), and during the sector erase time-out.

During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause DQ6 to toggle. (The

system may use either OE# or CE# to control the read cycles.) When the operation is complete, DQ6 stops toggling.

DQ7 = Data?

Yes

No

No

DQ5 = 1?

No

Yes

Yes

FAIL

PASS

Read DQ7–DQ0

Addr = VA

Read DQ7–DQ0

Addr = VA

DQ7 = Data?

START