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56F8167 Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc |
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56F8167 Datasheet(HTML) 35 Page - Freescale Semiconductor, Inc |
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35 / 184 page  Signal Pins 56F8367 Technical Data, Rev. 7.0 Freescale Semiconductor 35 Preliminary ISB0 (GPIOD10) 61 N8 Schmitt Input Schmitt Input/ Output Input, pull-up enabled ISB0 - 2 — These three input current status pins are used for top/bottom pulse width correction in complementary channel operation for PWMB. Port D GPIO — These GPIO pins can be individually programmed as input or output pins. At reset, these pins default to ISB functionality. To deactivate the internal pull-up resistor, clear the appropriate bit of the GPIOD_PUR register. For details, see Part 6.5.8. ISB1 (GPIOD11) 63 L8 ISB2 (GPIOD12) 64 P8 FAULTB0 67 N9 Schmitt Input Input, pull-up enabled FAULTB0 - 3 — These four fault input pins are used for disabling selected PWMB outputs in cases where fault conditions originate off-chip. To deactivate the internal pull-up resistor, set the PWMB bit in the SIM_PUDR register. For details, see Part 6.5.8. FAULTB1 68 L9 FAULTB2 69 L10 FAULTB3 72 P11 ANA0 100 G13 Input Analog Input ANA0 - 3 — Analog inputs to ADC A, channel 0 ANA1 101 H13 ANA2 102 G12 ANA3 103 F13 ANA4 104 F12 Input Analog Input ANA4 - 7 — Analog inputs to ADC A, channel 1 ANA5 105 H14 ANA6 106 G14 ANA7 107 E13 VREFH 113 D14 Input Analog Input VREFH — Analog Reference Voltage High. VREFH must be less than or equal to VDDA_ADC. VREFP 112 D13 Input/ Output Analog Input/ Output VREFP, VREFMID & VREFN — Internal pins for voltage reference which are brought off-chip so they can be bypassed. Connect to a 0.1 µF low ESR capacitor. VREFMID 111 E14 VREFN 110 F14 VREFLO 109 E12 Input Analog Input VREFLO — Analog Reference Voltage Low. This should normally be connected to a low-noise VSS. Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA Signal Name Pin No. Ball No. Type State During Reset Signal Description |
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