Preliminary Technical Data

AD5522

Rev. PrL | Page 31 of 45

14

MEAS1

13

MEAS0

Bits MEAS1 and MEAS0 allow selection of the required measure mode, allowing the measout line to be disabled, connected

to the temperature sensor or enabled for measurement or current or voltage.

MEAS1

MEAS0

Action

0

0

MEASOUT connected to I SENSE

0

1

MEASOUT connected to V SENSE

1

0

MEASOUT connected to Temperature Sensor

1

1

MEASOUT Hi-Z (SW 12 Open)

12

FIN

Bit FIN = 0 switches the input of the force amplifier to GND, while FIN = 1 connects it to FIN DAC output.

11

SFO

10

SSO

Bits SF0 through SS0 address each of the different combinations of switching the system force and sense lines to the force

and sense at the DUT. Selection of which channel the system force and sense lines are connected to as per P3 to P0

addressing.

SF0

SS0

Action

0

0

SYS_FORCE and SYS_SENSE Hi-Z

0

1

SYS_FORCE Hi-Z, SYS_SENSE connected to MEASVHx

1

0

SYS_FORCE connected to FOHx, SYS_SENSE Hi-Z

1

1

SYS_FORCE connected to FOHx, SYS_SENSE connected to MEASVHx

9

CL

Per PMU clamp enable bit. A logic high enables the clamp function for the selected PMU. The clamp enable function is also

available in the System control register. This dual functionality allows flexible enable or disabling of this function. When

reading back information on the status of the clamp enable function on a per channel basis, what was most recently written

to the clamp register is available in the readback word from either PMU or System Control Registers.

8

CPOLH

Comparator output enable bit. A logic high enables the comparator output for the selected PMU, the comparator function

CPBIASEN must be enabled in the SYSTEM CONTROL REGISTER. The comparator output enable function is also available in

the System control register. This dual functionality allows flexible enable or disabling of this function.

7

COMPARE V/I

A logic high selects compare voltage function, while logic low, current function.

6

CLEAR

To clear or reset a latched alarm bit and pin (temperature, guard or clamp), load a “1” to the Clear bit position. This bit applies

to latched alarm (clamp and guard) conditions on all four PMU channels.

5

4

3

2

1

0 (LSB)

0

Unused bits. Set to 0.