AD5522

Preliminary Technical Data

Rev. PrL | Page 36 of 45

READBACK OF PMU REGISTER

The PMU readback function is a 24 bit word, mode, address and PMU data bits.

Table 24. Readback PMU Register (Only one PMU register may be read back at any one time).

Bit

Bit name

Description

23 (MSB)

MODE1

0

22

MODE0

0

PMU REGISTER SPECIFIC BITS

21

CH EN

Channel Enable, If high selected channel is enabled, otherwise disabled.

20

FORCE1

19

FORCE0

These bits tell what force and measure mode the selected channel is in.

18

RESERVED

0

17

C2

16

C1

15

C0

These three bits tell what forced or measured current range is set for the selected channel.

14

MEAS1

13

MEAS0

Bits MEAS1 and MEAS0 tell which measure mode is selected, voltage, current, temperature sensor or Hi-

Z.

12

FIN

This bit shows the status of the Force input amplifier.

11

SFO

10

SSO

The system force and sense lines may be connected to any of the four PMU channels. Reading back these

bits tell if they are switched in or not.

9

CL

A logic high in this readback position tells if the Per PMU clamp is enabled, while if low, the clamp is

disabled. The clamp enable function is also available in the System Control Register. This dual

functionality allows flexible enable or disabling of this function. When reading back information on the

status of the clamp enable function, what was most recently written to the clamp register from either

System Control register or PMU register will be available in the readback word.

8

CPOLH

A logic high indicates that the PMU comparator output is enabled, while if low, it’s disabled. The

comparator output enable function is also available in the System Control Register. This dual

functionality allows flexible enable or disabling of this function. When reading back information on the

status of the comparator output enable function, what was most recently written to the comparator

register from either System Control register or PMU register will be available in the readback word.

7

COMPARE V/I

A logic high selects indicates the selected channel is comparing voltage function, while logic low, current

function.

6

LTMPALM

5

TMPALM

TMPALM corresponds to the open drain TMPALM output pin which flags the user of a temperature event

exceeding the default or user programmed level. The temperature alarm is a per device alarm, and latched

(LTMPALM) and unlatched (TMPALM) bits tell a temperature event occurred and if the alarm still exists (if

the junction temperature still exceeds the programmed alarm level). To reset an alarm event, the user

must write to the CLEAR bit in the PMU register.

4, 3, 2, 1, 0 (LSB)

Unused Readback bits

Will be loaded with zeros.

READBACK OF COMPARATOR STATUS REGISTER

The Comparator output status Register is a read only register giving access to the output status of each of the comparators on the chip.

Table 25 shows the format of the comparator readback word.

Table 25. Comparator Status Readback Register

Bit

Bit name

Description

23 (MSB)

MODE1

0

22

MODE0

1

COMPARATOR STATUS REGISTER SPECIFIC BITS

21

CP0L0

20

CP0H0

19

CP0L1

18

CP0H1

17

CP0L2

16

CP0H2

15

CP0L3

14

CP0H3

Comparator output conditions per channel corresponding to the comparator output pins.

13 to 0 (LSB)

Unused Readback bits

Will be loaded with zeros.