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ARMV4T Datasheet(PDF) 1 Page - Actel Corporation |
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ARMV4T Datasheet(HTML) 1 Page - Actel Corporation |
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1 / 30 page  July 2007 v 2 . 6 1 © 2006 Actel Corporation CoreMP7 Product Summary • Personal Audio (MP3, WMA, and AAC Players) • Personal Digital Assistants • Wireless Handset • Pagers • Digital Still Camera • Inkjet/Bubble-Jet Printer • Monitors Key Features • FPGA Optimized ARM7™ Family Processor • Compatible with ARM7TDMI-S™ • 32/16-Bit RISC Architecture (ARMv4T) • 32-Bit ARM® Instruction Set • 16-Bit Thumb® Instruction Set • 32-Bit Unified Bus Interface • 3-Stage Pipeline • 32-Bit ALU • 32-Bit Memory Addressing Range • Static Operation • EmbeddedICE-RT™ Real-Time Debug Unit • JTAG Interface Unit Benefits • Fully Implemented in FPGA Fabric • All Microprocessor I/Os Available to User • Unified Bus Interface Simplifies SoC Design • ARM and Thumb Instruction Sets Can Be Mixed ARM Supported Families •ProASIC®3 (M7A3P) • Fusion (M7AFS) Synthesis and Simulation Support • Directly Supported within the Actel Libero® Integrated Design Environment (IDE) • Synthesis: Synplify® and Design Compiler® • Simulation: Vital-Compliant VHDL Simulators and OVI-Compliant Verilog Simulators Verification and Compliance • Compliant with ARMv4T ISA • Compatible with ARM7TDMI-S Core Version • This Datasheet Defines the Functionality for CoreMP7 v1.0. Introduction The CoreMP7 soft IP core is an ARM7 family processor optimized for use in Actel ARM-ready FPGAs and is compatible with the ARM7TDMI-S. Users should refer to the ARM7TDM-S Technical Reference Manual (DDI0234A- 7TMIS-R4.pdf), published by the ARM Corporation, for detailed information on the ARM7. The ARM7 TRM is available for download from the ARM website at www.arm.com. CoreMP7 is supplied with an Advanced Microcontroller Bus Architecture (AMBA) Advanced High-Performance Bus (AHB) compliant wrapper for inclusion in an AMBA-based processor system such as the one generated by the Actel CoreConsole IP Deployment Platform (IDP). Contents Introduction ............................................................... 1 Device Utilization ....................................................... 2 General Description ................................................... 3 Programmer’s Model ................................................. 7 AHB Wrapper ........................................................... 12 CoreMP7 Variants ..................................................... 13 Delivery and Deployment ........................................ 14 Bus Functional Model .............................................. 14 AC Parameters .......................................................... 19 Debug ....................................................................... 23 Ordering Information .............................................. 28 List of Changes ......................................................... 28 Datasheet Categories ............................................... 29 |
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