Electronic Components Datasheet Search
  British  ▼
ALLDATASHEET.CO.UK

X  

ARMV4T Datasheet(PDF) 13 Page - Actel Corporation

Part # ARMV4T
Description  CoreMP7
PDF  30 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ACTEL [Actel Corporation]
Direct Link  http://www.actel.com
Logo ACTEL - Actel Corporation

ARMV4T Datasheet(HTML) 13 Page - Actel Corporation

Back Button ARMV4T Datasheet HTML 9Page - Actel Corporation ARMV4T Datasheet HTML 10Page - Actel Corporation ARMV4T Datasheet HTML 11Page - Actel Corporation ARMV4T Datasheet HTML 12Page - Actel Corporation ARMV4T Datasheet HTML 13Page - Actel Corporation ARMV4T Datasheet HTML 14Page - Actel Corporation ARMV4T Datasheet HTML 15Page - Actel Corporation ARMV4T Datasheet HTML 16Page - Actel Corporation ARMV4T Datasheet HTML 17Page - Actel Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 30 page
background image
CoreMP7
v2.6
13
CoreMP7 Variants
There are two implementations of CoreMP7 (Core Only and Core Plus Debug). The utilization and performance of the
variants are shown in Table 1 on page 2.
Core Plus Debug
The Core Plus Debug variant is configured with all
features of the ARM7TDMI-S. The variant incorporates
the full debug functionality of the ARM7TDMI-S and is
fully compliant with RealView RVDS, RVDK, and other
ARM software debug tools.
Core Only
The Core Only variant has the same features as the Core
Plus Debug variant except that it does not include the
ICE-RT debug block or the TAP controller, which reduces
the size of the core. This means that the standard debug
tools cannot be used with this variant of CoreMP7.
No Debug
This is the most obvious characteristic of the Core Only
variant. To reduce area, the Debug EmbeddedICE-RT
macrocell, the EmbeddedICE-RT TAP controller, and the
scan logic have been optimized out. This means that
standard software debug tools cannot be used when this
variant of the CoreMP7 is instantiated. Users can employ
the Core Plus Debug variant for development, and when
the application has been fully tested and debugged, the
Core Only variant can be instantiated to reduce area in
the final shipping product.
No Coprocessor Interface
The coprocessor interface is a rarely used feature in
ARM7 family microprocessors and has been removed
from CoreMP7 to minimize area.
Little Endian Only
Most microprocessor-based systems use Little Endian
byte ordering. The option of selecting Big Endian has
been removed from CoreMP7 to minimize area.
On-Chip RAM Consumed by Register Block
To minimize the area, the CoreMP7 variants map the
processor register block into on-chip RAM. RAM blocks
used to implement CoreMP7 registers are no longer
available for use in user designs.
Figure 8 •
ARM7 TDMI-S Core
ARM7 CPU
Coprocessor
Signals
Data
Address
Bus Control
Signals
Debug Interface
Debug JTAG
Signals
ARM7TDMI-S Core
Debug
EmbeddedICE-RT
(Debug)
TAP
Controller



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com