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ARMV4T Datasheet(PDF) 2 Page - Actel Corporation |
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ARMV4T Datasheet(HTML) 2 Page - Actel Corporation |
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2 / 30 page ![]() CoreMP7 2 v2.6 ARM7 Family Processor CoreMP7 is a general purpose, 32-bit, ARM7 family microprocessor that offers high performance and low power consumption. The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles. The simplicity of RISC results in a high instruction throughput and fast real-time interrupt response from a small and cost-effective processor core. Pipeline techniques are employed so that all parts of the processing and memory systems can operate continuously. Typically, while one instruction is being executed, its successor is being decoded, and a third instruction is being fetched from memory. The CoreMP7 processor also implements the Thumb instruction set, which makes it ideally suited to high-volume applications with memory restrictions, or applications where code density is an issue. The 16-bit Thumb instruction set approaches twice the density of standard ARM code while retaining most of the ARM performance advantage over a traditional 16-bit processor using 16-bit registers. This is possible because Thumb code operates on the same 32-bit register set as ARM code. Thumb code is able to reduce up to 65% of the code size compared to 32-bit ARM instructions, and offers 160% of the performance of an equivalent ARM processor connected to a 16-bit memory system. Device Utilization CoreMP7 is available with and without debug for use in each ARM-enabled device. These variants (Core only or Core plus debug) are available in CoreConsole and are easily selected from the core configuration menus. The utilization and performance of the variants for each device are shown in Table 1. Core Only This variant of the CoreMP7 is optimized for maximum speed and minimum size and does not include debug. Core Plus Debug This variant of the CoreMP7 is optimized for minimum size and includes debug. Table 1 • CoreMP7 Utilization and Performance Device Variant Performance (MHz) Tiles RAM Block Utilization (%) M7A3P1000 Core Only 28.12 6,083 4 24.8% Core Plus Debug 21.7 7,931 4 32.3% M7AFS600 Core Only 28.08 6,083 4 44.0% Core Plus Debug 20.57 7,931 4 57.4% |
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