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SPEAR1310 Datasheet(PDF) 30 Page - STMicroelectronics

Part # SPEAR1310
Description  Dual-core Cortex A9 embedded MPU for communications
PDF  57 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR1310 Datasheet(HTML) 30 Page - STMicroelectronics

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USB Host controller (UHC)
SPEAr1310
30/57
Doc ID 17528 Rev 4
17
USB Host controller (UHC)
17.1
Main features
The USB 2.0 Host controller has 2 physical ports that are fully compliant with the Universal
Serial Bus specification (version 2.0), and provides an interface to the industry-standard
AHB bus.
The main features of the UHC are:
A PHY interface implementing a USB 2.0 transceiver macro-cell interface plus (UTMI+)
fully compliant with UTMI+ specification (revision 1.0), to execute serialization and de-
serialization of transmissions over the USB line
Either 30 MHz clock for 16-bit interface or 60 MHz for 8-bit interface supported by the
UTMI + PHY interface
A USB 2.0 Host controller (UHC) connected to the AHB bus that generates the
commands for the UTMI+PHY
Complies with both the enhanced host controller interface (EHCI) specification (version
1.0) and the open host controller interface (OHCI) specification (version 1.0a)
The UHC supports the 480 Mbps high-speed (HS) for USB 2.0 through an embedded
EHCI Host Controller, as well as the 12 Mbps full-speed (FS) and the 1.5 Mbps low-
speed (LS) for USB 1.1 through one integrated OHCI Host controller
All clock synchronization is handled within the UHC
An AHB slave for each controller (1 EHCI and 1 OHCI), acting as programming
interface to access to control and status registers
An AHB master for each controller (1 EHCI and 1 OHCI) for data transfer to system
memory, supporting 8-, 16-, and 32-bit wide data transactions on the AHB bus
32-bit AHB bus addressing



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