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OPTION_REG Datasheet(PDF) 160 Page - Microchip Technology |
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OPTION_REG Datasheet(HTML) 160 Page - Microchip Technology |
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160 / 222 page  FIGURE 27-11: I2C SLAVE, 7-BIT ADDRESS, TRANSMISSION (AHEN = 1) Receiving Address Automatic Transmitting Data Automatic Transmitting Data A7 A6 A5 A4 A3 A2 A1 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 SDA SCL SSPIF BF ACKDT ACKSTAT CKP R/W D/A Received address is read from SSPBUF BF is automatically cleared after 8th falling edge of SCL Data to transmit is loaded into SSPBUF Cleared by software Slave clears ACKDT to ACK address Master’s ACK response is copied to SSPSTAT CKP not cleared after not ACK Set by software, releases SCL ACKTIM is cleared on 9th rising edge of SCL ACKTIM is set on 8th falling edge of SCL When AHEN = 1; CKP is cleared by hardware after receiving matching address. When R/W = 1; CKP is always cleared after ACK S P Master sends Stop condition ACK R/W = 1 Master releases SDAx to slave for ACK sequence ACK ACK ACKTIM |
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