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DSPIC33FJ32GP204TE/ML Datasheet(PDF) 45 Page - Microchip Technology |
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DSPIC33FJ32GP204TE/ML Datasheet(HTML) 45 Page - Microchip Technology |
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45 / 403 page ![]() XMODSRT 0048 XS<15:1> 0xxxx XMODEND 004A XE<15:1> 1xxxx YMODSRT 004C YS<15:1> 0xxxx YMODEND 004E YE<15:1> 1xxxx XBREV 0050 BREN XB<14:0> xxxx DISICNT 0052 — — Disable Interrupts Counter Register xxxx TABLE 4-1: CPU CORE REGISTERS MAP (CONTINUED) SFR Name SFR Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 All Resets Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. |
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