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T89C5115-RATIM Datasheet(PDF) 91 Page - ATMEL Corporation |
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T89C5115-RATIM Datasheet(HTML) 91 Page - ATMEL Corporation |
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91 / 105 page  91 T89C5115 4128A–8051–04/02 Table 67. IPH1 Register IPH1 (S:F7h) Interrupt high priority Register 1 Reset Value = xxxx xx0xb 76 54 32 1 0 - - - - - - PADCH - Bit Number Bit Mnemonic Description 7- Reserved The value read from this bit is indeterminate. Do not set this bit. 6- Reserved The value read from this bit is indeterminate. Do not set this bit. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3- Reserved The value read from this bit is indeterminate. Do not set this bit. 2- Reserved The value read from this bit is indeterminate. Do not set this bit. 1 PADCH ADC Interrupt Priority level most significant bit PADCH PADCL Priority level 00 Lowest 01 10 1 1 Highest 0- Reserved The value read from this bit is indeterminate. Do not set this bit. |
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