ST6G3244ME

Functional description

Doc ID 022157 Rev 2

7/27

DAT2.h

A1

I/O

A

Host side data input/output

DAT3.h

B1

I/O

A

Host side data input/output

WP

E4

Input to CPU

A

Write protect

CD

D3

Input to CPU

A

Card detect

CMDB

D4

I/O

B

Card side command

CLKB

C5

Output

B

Card side clock output

DAT0B

D5

I/O

B

Card side data input/output

DAT1B

E5

I/O

B

Card side data input/output

DAT2B

A5

I/O

B

Card side data input/output

DAT3B

B5

I/O

B

Card side data input/output

1.

Collective names are used for groups of pins in the datasheet:

*.dir = CMD.dir, DAT0.dir, DAT123.dir

*.h = CMD.h, CLK.h, DAT0.h, DAT1.h, DAT2.h, DAT3.h

*B = CMDB, CLKB, DAT0B, DAT1B, DAT2B, DAT3B

Table 2.

Pin name

Bump

Type

Side

Description

Table 3.

Direction control

Command signals

Direction of B-side signals(1)

H

H

X

X

IN

IN

OUT

X

X

OUT

OUT

X

X

HL

X

X

OUT

IN

OUT

X

X

IN

OUT

X

X

H

X

H

X

X

IN

OUT

IN

X

X

OUT

OUT

X

H

X

L

X

X

IN

OUT

OUT

X

X

OUT

IN

X

H

X

X

H

X

IN

OUT

X

IN

X

OUT

X

OUT

H

X

X

L

X

IN

OUT

X

OUT

X

OUT

X

IN

LX

X

X

X

X

Z

X

X

(2)

Z

(2)

(2)

1.

When the direction of the A-side signal is INPUT, the host CPU WRITES to the SD Card (i.e. the direction of the B-side

signal is OUTPUT).

When the direction of the A-side signal is OUTPUT, the host CPU READS the SD Card (i.e. the direction of the B-side

signal is INPUT).

2.

Level of the B-side signals when EN = L is defined by the internal resistors as listed in Table 7.

Note:

During application design it has to be considered that the level shifter device needs some

time to change the direction after a change of the .dir signal level. Valid data on the input of

in Table 12.