XRT83SL34IV datasheet(34/80 Pages) EXAR

34 / 80 page

XRT83SL34

QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

REV. P1.0.8

PRELIMINARY

PROGRAMMING CONSIDERATIONS

In many applications switching the control of the transmitter outputs and the receiver line impedance to

hardware control will provide faster transmitter ON/OFF switching.

In Host Mode, there are two bits in register 130 (82H) that control the transmitter outputs and the Rx line

impedance select, TXONCNTL (Bit 7) and TERCNTL (Bit 6).

Setting bit-7 (TXONCNTL) to a “1” transfers the control of the Transmit On/Off function to the TXON_n

Hardware control pins. (Pins 90 through 93 and pins 169 through 172).

Setting bit-6 (TERCNTL) to a “1” transfers the control of the Rx line impedance select (RXTSEL) to the

RXTSEL Hardware control pin (pin 83).

Either mode works well with redundancy applications. The user can determine which mode has the fastest

switching time for a unique application.

TYPICAL REDUNDANCY SCHEMES

·1:1 One backup card for every primary card (Facility Protection)

·1+1 One backup card for every primary card (Line Protection)

·N+1One backup card for N primary cards

1:1 REDUNDANCY

A 1:1 facility protection redundancy scheme has one backup card for every primary card. When using 1:1

redundancy, the backup card has its transmitters tri-stated and its receivers in high impedance. This eliminates

the need for external relays and provides one bill of materials for all interface modes of operation. The transmit

and receive sections of the LIU device are described separately.

1+1 REDUNDANCY

A 1+1 line protection redundancy scheme has one backup card for every primary card, and the receivers on

the backup card are monitoring the receiver inputs. Therefore, the receivers on both cards need to be active.

The transmit outputs require no external resistors. The transmit and receive sections of the LIU device are

described separately.

TRANSMIT 1:1 & 1+1 REDUNDANCY

For 1:1 and 1+1 redundancy, the transmitters on the primary and backup card should be programmed for

Internal Impedance mode. The transmitters on the backup card should be tri-stated. Select the appropriate

impedance for the desired mode of operation, T1/E1/J1. A 0.68uF capacitor is used in series with TTIP for

blocking DC bias. See Figure 14 for a simplified block diagram of the transmit section for 1:1 and 1+1

redundancy scheme.

NOTE: For simplification, the over voltage protection circuitry was omitted.

XRT83SL34IV Datasheet(PDF) 34 Page - Exar Corporation