Data Sheet

ADRF6755

Rev. B | Page 7 of 48

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

GAIN CONTROL

Gain Range

47

dB

Step Size

1

dB

Relative Step Accuracy

Fixed frequency, adjacent steps, all attenuation steps,

LO > 300 MHz2

±0.3

dB

Over full frequency range, adjacent steps, all attenuation

steps, LO > 300 MHz3

±1.5

dB

Absolute Step Accuracy4

47 dB attenuation step, LO > 300 MHz5

−2.0

dB

Output Settling Time

Any step; output power settled to ±0.2 dB

15

µs

OUTPUT DISABLE

TXDIS pin

Off Isolation

RFOUT, attenuator setting = 0 dB to 47 dB, TXDIS high

−100

dBm

LO, attenuator setting = 0 dB to 47 dB, TXDIS high

−75

dBm

2× LO, attenuator setting = 0 dB to 47 dB, TXDIS high

−50

dBm

Turn-On Settling Time

TXDIS high to low: output power to 90% of envelope

180

ns

Frequency settling to 100 Hz

20

µs

Turn-Off Settling Time

TXDIS low to high (to −55 dBm)

350

ns

MONITOR OUTPUT

LOMON, LOMON pins

Nominal Output Power

−24

dBm

BASEBAND INPUTS

IBB, IBB, QBB, QBB pins

I and Q Input Bias Level

500

mV

3 dB Bandwidth

600

MHz

LOGIC INPUTS

CS, TXDIS pins

1.4

V

CS, TXDIS pins

0.6

V

SDI/SDA, CLK/SCL pins

2.1

V

SDI/SDA, CLK/SCL pins

1.1

V

CS, TXDIS, SDI/SDA, CLK/SCL pins

±1

µA

CS, TXDIS, SDI/SDA, CLK/SCL pins

10

pF

LOGIC OUTPUTS

2.8

V

0.4

V

0.4

V

POWER SUPPLIES

VCC1, VCC2, VCC3, VCC4, VREG1, VREG2, VREG3, VREG4,

VREG5, VREG6, and REGOUT pins;

REGOUT normally connected to VREG1, VREG2, VREG3,

VREG4, VREG5, and VREG6

Voltage Range

VCC1, VCC2, VCC3, and VCC4

4.75

5

5.25

V

REGOUT, VREG1, VREG2, VREG3, VREG4, VREG5, and

VREG6

3.3

V

Supply Current

VCC1, VCC2, VCC3, and VCC4 combined; REGOUT con-

nected to VREG1, VREG2, VREG3, VREG4, VREG5, and

VREG6

380

420

mA

Power-Down Current

CR29[0] = 0, power down modulator,

CR12[2] = 1, power down PLL,

CR28[4] = 1, power down RFDIVIDER,

CR27[2] = 0, power down LOMON

7

mA

Operating Temperature

−40

+85

°C

1

LO carrier feedthrough is expressed in dBc relative to the RF output power changing as the attenuator is stepped. LO carrier feedthrough is constant as the RF output

is altered due to a change in the I/Q input amplitude.

2

For relative step accuracy at LO < 300 MHz, refer to Figure 37.

3

For relative step accuracy over frequency range at LO < 300 MHz, refer to Figure 39.

4

All other attenuation steps have an absolute error of <±2.0 dB.

5

For absolute step accuracy at LO < 300 MHz, refer to Figure 40.