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L9177ATR Datasheet(PDF) 41 Page - STMicroelectronics |
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L9177ATR Datasheet(HTML) 41 Page - STMicroelectronics |
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41 / 55 page ![]() Figure 36. Low side drivers slew rate GAPGPS00619 IP2 IP1 IN1 IN2 IN1 IP1 Igate Vgate Igate Vgate VOUT VOUT IOUT VLVT VLVT 80% 20% not controlled IOUT not controlled At switch-on command the charging current is provided by current generator IP1 and is kept constant until the output voltage is decreased of roughly 80% of typical battery level. At this point the low side transistor is on and VLVT signal is set to logic 1 to connect IP2 current generator in parallel with IP1, completing the gate charge curve and providing maximum gate drive. When the power transistor is switched-off the gate is discharged quickly using both IN1 and IN2 currents; as soon as the output voltage reaches roughly 20 % of the nominal battery voltage only IN1 is kept connected to complete the gate discharging. In Table 33 the values for IPx and INx current generators are reported for each low side. As an example Figure 37 shows the resulting slew rate, in typical conditions, of O2H low side driver. Table 33. Values for IPx and INx current generators for each low side Low side IP1 IP2 IN1 IN2 Unit O2H 243 81 253 337 µA INJ 174 23 180 124 µA RLY’s 78 0 80 120 µA L 78 0 62 119 µA TACH 22 0 21 25 µA L9177A Low side drivers DS12175 - Rev 5 page 41/55 |
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