SPEAR1340 datasheet(112/200 Pages) STMICROELECTRONICS

112 / 200 page

Pin description

SPEAr1340

112/200

Doc ID 023063 Rev 4

MCIF_DMARQ_RnB_WP

CF: DMARQ

A DMA request, asserted by the device when it is ready to transfer

data to or from the host.

For multiword DMA transfers, the direction of data transfer is

controlled by -IORD and -IOWR. The device waits until the host

asserts -DMACK before negating DMARQ, and then reasserts

DMARQ if there is more data to transfer.

DMARQ is not driven when the device is not selected.

While a DMA operation is in progress, -CS0 and –CS1 are held

negated.

xD:

Ready/Busy Output from xD Card.

SD:

Active high. SD card write protect

ID15

MCIF_nIORD_nRE

CF: -IORD, -HDMARDY, HSTROBE.

An IO read strobe (-IORD) generated by the host. This signal gates

IO data onto the bus from the CF storage card or CF+ card when the

card is configured to use the interface.

When in ultra DMA mode, DMA Read is active; this signal (-

HDMARDY) is asserted by the host to indicate that the host is read to

receive Ultra DMA data-in bursts. The host may negate -HDMARDY

to pause an ultra DMA transfer.

When ub ultra DMA mode, DMA Write is active; this signal is the data

out strobe (HSTROBE) generated by the host. Both the rising and

falling edge of HSTROBE cause data to be latched by the device.

The host may stop generating HSTROBE edges to pause an Ultra

DMA dataout burst.

xD:

Read enable

OD18

MCIF_nIOWR_nWE

CF: -IOWR, STOP

The IO Write strobe (-IOWR) pulse is used to clock IO data on the

card data bus into the CF+ card controller registers when the CF+

card is configured to use the IO interface. The clocking occurs on the

negative to positive (trailing) edge of the signal.

While Ultra DMA mode protocol is active, the assertion of this signal

(STOP) causes the termination of the Ultra DMA Burst.

This signal must be negated before entering ultra DMA mode

protocol.

Write enable

OE20

MCIF_nRESET_CF

CF: -RESET

Active low hardware reset from the Host

OA19

MCIF_nCS0_nCE

CF: -CS0

-CS0 is the chip select for the task file registers. While -DMACK is

asserted, this signal is held negated.

xD:

Chip enable

OB19

MCIF_CF_INTR

CF: INTRQ

Active high interrupt request from the device to the Host

IC19

Table 23.

Connectivity- MCIF signals description (continued)

Signal name

Description(1)

Type

Ball

SPEAR1340 Datasheet(PDF) 112 Page - STMicroelectronics

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