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SPEAR1340 Datasheet(PDF) 18 Page - STMicroelectronics

Part # SPEAR1340
Description  Dual-core Cortex A9 HMI embedded MPU
PDF  200 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR1340 Datasheet(HTML) 18 Page - STMicroelectronics

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Device functions
SPEAr1340
18/200
Doc ID 023063 Rev 4
2.13
Memory card interfaces (MCIF)
MCIF is a hardware IP that interfaces with the most common memory cards on the market:
SD/SDIO 2.0
SDHC
CF/CF+ Rev 4.1
MMC 4.2/4.3
xD
The device interface multiplexes different memory cards on the same IOs; only one memory
card is accessible at a given time. At the board level, discrete elements are required to
handle host-swap management.
Main features:
SD/SDIO/MMC controller
Compliant with:
SD Host controller standard specification version 2.0
SDIO card specification version 2.0
SD memory card specification draft version 2.0
SD memory card security specification version 1.01
MMC specification version 3.31, 4.2 and 4.3
AMBA specification AHB (version 2.0)
Data transfer with the system core through:
PIO mode on the Host AHB slave interface
DMA mode on the Host AHB master interface
Host clock rate variable from 0 to 50 MHz
Maximum data rate achievable:
200 Mbps (sd4 bit mode)
400 Mbps (mmc8 bit mode)
Data transfer:
SD mode: 1 bit, 4 bit, and SPI mode
MMC mode: 1 bit, 4 bit, 8 bit, and SPI mode
Cyclic redundancy check for commands (CRC7) and for data integrity (CRC16)
Variable length data transfer
Read wait control and suspend/resume operations supported
Works with IO cards, read-only cards and read/write cards
Supports MMC Plus and MMC Mobile
Error correction code support for MMC 4.3 cards
Card detection (insertion/removal)
Card password protection
Two 4K FIFO to aid data transfer between the CPU and the controller
FIFO overrun and underrun handled by stopping the SD clock



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