AT45DB321D_12 datasheet(18/51 Pages) AD

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AT45DB321D [DATASHEET]

3597R–DFLASH–11/2012

Additional Commands

9.1

Main Memory Page to Buffer Transfer

A page of data can be transferred from the main memory to either buffer 1 or buffer 2. To start the operation for the standard

DataFlash page size (528 bytes), a one-byte opcode, 53H for buffer 1 or 55H for buffer 2, must be clocked into the device,

followed by three address bytes comprised of 1 don’t care bit, 13 page address bits (PA12 - PA0) that specify the page in main

memory that is to be transferred, and 10 don’t care bits. To perform a main memory page to buffer transfer for the binary page

size (512 bytes), the 53H opcode for buffer 1 or 55H opcode for buffer 2 must be clocked into the device, followed by three

address bytes consisting of 2 don’t care bits, 13 page address bits (A21 - A9) that specify the page in the main memory that is

to be transferred, and 9 don’t care bits. The CS pin must be low while toggling the SCK pin to load the opcode and the address

bytes from the input pin (SI). The transfer of page of data from the main memory to the buffer will begin when the CS pin

transitions from a low to a high state. During the transfer of a page of data (tXFR), the status register can be read or the

RDY/BUSY can be monitored to determine whether the transfer has been completed.

9.2

Main Memory Page to Buffer Compare

A page of data in the main memory can be compared to the data in buffer 1 or buffer 2. To initiate the operation for a standard

DataFlash page size (528 bytes), a one-byte opcode, 60H for buffer 1 or 61H for buffer 2, must be clocked into the device,

followed by three address bytes consisting of 1 don’t care bit, 13 page address bits (PA12 - PA0) that specify the page in the

main memory that is to be compared to the buffer, and 10 don’t care bits. To start a main memory page to buffer compare for a

binary page size (512 bytes), the 60H opcode for buffer 1 or 61H opcode for buffer 2 must be clocked into the device, followed

by three address bytes consisting of 2 don’t care bits, 13 page address bits (A21 - A9) that specify the page in the main memory

that is to be compared to the buffer, and 9 don’t care bits. The CS pin must be low while toggling the SCK pin to load the opcode

and the address bytes from the input pin (SI). On the low-to-high transition of the CS pin, the data bytes in the selected main

memory page will be compared with the data bytes in buffer 1 or buffer 2. During this time (tCOMP), the status register and the

RDY/BUSY pin will indicate that the part is busy. On completion of the compare operation, bit 6 of the status register is updated

with the result of the compare.

9.3

Auto Page Rewrite

This mode is needed only when multiple bytes within a page or multiple pages of data are modified in a random fashion within a

sector. This mode is a combination of two operations:

Main memory page to buffer transfer, and

Buffer to main memory page program, with built-in erase.

A page of data is first transferred from the main memory to buffer 1 or buffer 2, and then the same data (from buffer 1 or buffer

2) are programmed back into their original page of main memory. To start the rewrite operation for the standard DataFlash page

size (528 bytes), a one-byte opcode, 58H for buffer 1 or 59H for buffer 2, must be clocked into the device, followed by three

address bytes comprised of 1 don’t care bit, 13 page address bits (PA12-PA0) that specify the page in main memory to be

rewritten, and 10 don’t care bits. To initiate an auto page rewrite for a binary page size (512 bytes), the 58H opcode for buffer 1

or 59H opcode for buffer 2 must be clocked into the device, followed by three address bytes consisting of 2 don’t care bits, 13

page address bits (A21 - A9) that specify the page in the main memory that is to be written, and 9 don’t care bits. When a low-

to-high transition occurs on the CS pin, the part will first transfer data from the page in main memory to a buffer and then

program the data from the buffer back into same page of main memory. The operation is internally self-timed, and should take

place in a maximum time of tEP. During this time, the status register and the RDY/BUSY pin will indicate that the part is busy.

If a sector is programmed or reprogrammed sequentially page by page, then the programming algorithm shown in Figure 23-1,

page 41 is recommended. Otherwise, if multiple bytes in a page or several pages are programmed randomly in a sector, then

the programming algorithm shown in Figure 23-2, page 42 is recommended. Each page within a sector must be

updated/rewritten at least once within every 20,000 cumulative page erase/program operations in that sector. Please contact

Adesto for availability of devices that are specified to exceed the 20,000 cycle cumulative limit.

AT45DB321D Datasheet(PDF) 18 Page - Analog Devices

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