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AT45DB321D Datasheet(PDF) 19 Page - Analog Devices

Part # AT45DB321D
Description  32Mb, 2.5V or 2.7V DataFlash
PDF  51 Pages
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AT45DB321D Datasheet(HTML) 19 Page - Analog Devices

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AT45DB321D [DATASHEET]
3597R–DFLASH–11/2012
9.4
Status Register Read
The status register can be used to determine the device’s ready/busy status, page size, a main memory page to buffer compare
operation result, the sector protection status, or the device density. The status register can be read at any time, including during
an internally self-timed program or erase operation. To read the status register, the CS pin must be asserted and the opcode of
D7H must be loaded into the device. After the opcode is clocked in, the one-byte status register will be clocked out on the output
pin (SO), starting with the next clock cycle. The data in the status register, starting with the msb (bit 7), will be clocked out on the
SO pin during the next eight clock cycles. After the one byte of the status register has been clocked out, the sequence will
repeat itself (as long as CS remains low and SCK is being toggled). The data in the status register is constantly updated, and so
each repeating sequence will output new data.
Ready/busy status is indicated using bit 7 of the status register. If bit 7 is a one, then the device is not busy and is ready to
accept the next command. If bit 7 is a zero, then the device is in a busy state. Since the data in the status register is constantly
updated, the user must toggle the SCK pin to check the ready/busy status.
There are several operations that can cause the device to be in a busy state:
Main memory page to buffer transfer
Main memory page to buffer compare
Buffer to main memory page program
Main memory page program through buffer
Page erase, block erase, sector erase, and chip erase
Auto page rewrite
The result of the most recent main memory page to buffer compare operation is indicated using bit 6 of the status register. If bit
6 is a zero, then the data in the main memory page matches the data in the buffer. If bit 6 is a one, then at least one bit of the
data in the main memory page does not match the data in the buffer.
Bit 1 of the status register is used to provide information to the user whether sector protection has been enabled or disabled,
either by the software-controlled or hardware-controlled method. A logic one indicates that sector protection has been enabled,
and logic zero indicates that sector protection has been disabled.
Bit 0 o the status register indicates whether the page size of the main memory array is configured for a “power of two” binary
page size (512 bytes) or a standard DataFlash page size (528 bytes). If bit 0 is a one, then the page size is set to 512 bytes. If
bit 0 is a zero, then the page size is set to 528 bytes.
The device density is indicated using bits 5, 4, 3, and 2 of the status register. For the AT45DB321D, the four bits are 1101. The
decimal value of these four binary bits does not equate to the device density — the four bits represent a combinational code
relating to differing densities of DataFlash devices. The device density is not the same as the density code indicated in the
JEDEC device ID information. The device density is provided only for backward compatibility.
Table 9-1.
Status Register Format
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RDY/BUSY
COMP
1
1
0
1
Protect
Page size



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