Z8018233FSC datasheet(79/109 Pages) ZILOG

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Z80182/Z8L182

ZILOG INTELLIGENT PERIPHERAL

PRELIMINARY

Zilog

DS971820600

EMULATION MODES (Continued)

Table 21. Emulation Mode 1

Normal

Emulation Adaptor

Signal

Mode 0

Mode 1

PHI

Output

Input

/M1

Output

Input

/MREQ,/MRD

Output

Input

/IORQ

Output

Input

/RD

Output

Input

/WR

Output

Input

/RFSH

Output

Input

/HALT

Output

Input

Output

Input

Output

Tri-state

/BUSACK

Output

Input

/WAIT

Input

Output

A19,A18/T

OUT

Output

Input

A17-A0

Output

Input

D7-D0

Input/Output

TxA0

Output

Tri-state

/RTS0

Output

Tri-state

TxA1

Output

Tri-state

/INT0

Input

Output, Open-Drain

Mode 2 Emulation Probe Mode

In the Emulator Probe Mode all of the Z182 output signals

are tri-state. This scheme allows a Z182 emulator probe to

grab on to the Z182 package leads on the target system.

Mode 3 RESERVED (for test purposes only)

This mode is reserved for test purpose only, do not use.

Notes:

Z182 has two branches of reset. /RESET controls the Z182

overall configuration, RAM and ROM boundaries, plus the

ESCC, Port and the 16550 MIMIC interface. In Normal

Mode, a "one shot" circuit samples the input of the /RESET

pin to assert the internal reset to its proper duration. In

Adapter Mode, this "one shot" circuit is bypassed. Note

also that the Z180’s crystal oscillator is disabled in Mode

1 and Mode 2.

In Mode 1 the emulator must provide /MREQ on the

(/MREQ,/MRD) Z80182/Z8L182 pin (not /MRD); and A18

(not T

OUT) on the A18/TOUT pin.

SLEEP, HALT EFFECT ON MIMIC AND 182 SIGNALS

The following signals are High-Z during SLEEP and HALT:

/IOCS when so selected in the Interrupt

Edge/Pin MUX Register.

/RD and /WR.

A0-A19 (A18 if selected) always High-Z in power down.

D0-D7 always High-Z in power down modes.

The MIMIC logic of the 182 is disabled during power down

modes of the Z180.

The following Z80182/Z8L182 signals are driven High

when Z180™ MPU enters a SLEEP or HALT state:

/MRD when selected in the Interrupt

Edge/Pin MUX Register.

/MWR when selected in the Interrupt

Edge/Pin MUX Register.

/ROMCS,/RAMCS always High in

SLEEP or HALT.

Z8018233FSC Datasheet(PDF) 79 Page - Zilog, Inc.

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