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Z8018233FSC Datasheet(PDF) 54 Page - Zilog, Inc. |
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Z8018233FSC Datasheet(HTML) 54 Page - Zilog, Inc. |
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54 / 109 page  3-54 Z80182/Z8L182 ZILOG INTELLIGENT PERIPHERAL PRELIMINARY Zilog DS971820600 CONTROL REGISTERS (Continued) D7 D6 D5 D4 D3 D2 D1 D0 TC0 Write Register 12 TC1 TC2 TC3 TC4 TC5 TC6 TC7 Lower Byte of Time Constant D7 D6 D5 D4 D3 D2 D1 D0 Write Register 14 0 0 0 Null Command 0 0 1 Enter Search Mode 0 1 0 Reset Missing Clock 0 1 1 Disable DPLL 1 0 0 Set Source = BR Generator 1 0 1 Set Source = /RTxC 1 1 0 Set FM Mode 1 1 1 Set NRZI Mode BR Generator Enable BR Generator Source /DTR/Request Function Auto Echo Local Loopback D7 D6 D5 D4 D3 D2 D1 D0 TC8 Write Register 13 TC9 TC10 TC11 TC12 TC13 TC14 TC15 Upper Byte of Time Constant D7 D6 D5 D4 D3 D2 D1 D0 WR7' SDLC Feature Enable Write Register 15 Zero Count IE SDLC FIFO Enable DCD IE Sync/Hunt IE CTS IE Tx Underrun/EOM IE Break/Abort IE Figure 52. Write Register Bit Functions (Continued) |
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