 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
Z8018233FSC Datasheet(PDF) 31 Page - Zilog, Inc. |
|
|
|||||||||||||||||||||||||||||
Z8018233FSC Datasheet(HTML) 31 Page - Zilog, Inc. |
|
|
31 / 109 page  3-31 Z80182/Z8L182 ZILOG INTELLIGENT PERIPHERAL PRELIMINARY Zilog DS971820600 MPBT MP /CTS/ PS SS2 SS1 SS0 Invalid R/W 0 R/W † R/W 0 R/W 0 R/W 1 R/W 1 R/W 1 R/W R/W CNTLB0 Clock Source and Speed Select Addr 02H Bit Upon Reset DR PE0 Divide Ratio Parity Even or Odd Clear To Send/Prescale Multiprocessor Multiprocessor Bit Transmit † /CTS - Depending on the condition of /CTS pin. PS - Cleared to 0. General PS = 0 PS = 1 Divide Ratio (Divide Ratio = 10) (Divide Ratio = 30) SS, 2, 1, 0 DR = 0 (x16) DR = 1 (x64) DR = 0 (x16) DR = 1 (x64) 000 Ø ÷ 160 Ø ÷ 640 Ø ÷ 480 Ø ÷ 1920 001 Ø ÷ 320 Ø ÷ 1280 Ø ÷ 960 Ø ÷ 3840 010 Ø ÷ 640 Ø ÷ 2580 Ø ÷ 1920 Ø ÷ 7680 011 Ø ÷ 1280 Ø ÷ 5120 Ø ÷ 3840 Ø ÷ 15360 100 Ø ÷ 2560 Ø ÷ 10240 Ø ÷ 7680 Ø ÷ 30720 101 Ø ÷ 5120 Ø ÷ 20480 Ø ÷ 15360 Ø ÷ 61440 110 Ø ÷ 10240 Ø ÷ 40960 Ø ÷ 30720 Ø ÷ 122880 111 External Clock (Frequency < Ø ÷ 40) Figure 11. ASCI Control Register B (Ch. 0) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
British ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
