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Z87200 Datasheet(PDF) 7 Page - Zilog, Inc.

Part # Z87200
Description  Spread-Spectrum Transceiver
PDF  54 Pages
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Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z87200 Datasheet(HTML) 7 Page - Zilog, Inc.

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Z87200
Zilog
Spread-Spectrum Transceiver
DS96WRL0400
4-7
4
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed under Absolute Maxi-
mum Ratings may cause permanent damage to the de-
vice. This is a stress rating only; operation of the device at
any condition above those indicated in the operational sec-
tions of these specifications is not implied. Exposure to ab-
solute maximum rating conditions for extended period may
affect device reliability.
D.C. CHARACTERISTICS
Operating Conditions: VDD = 5.0V ±5%, VSS = 0V
Symbol
Parameter
Range
Units
TSTG
Storage Temperature
–55 to +150
°C
VDD (max) Supply Voltage on VDD –0.3 to + 7
Volts
VI(max)
Input Voltage
–0.3 to VDD+0.3 Volts
II
DC Input Current
±10
mA
TA
Operating
Temperature (Ambient)
0 to +70
°C
TA = 0° to +70°C
Typ
Symbol
Parameter
Min
Max
@ 25
°C
Units
Conditions
IDDQ
Supply Current,
Quiescent
1.0
mA
Static, no clock
IDD
Supply Current,
Operational
380
170
[Note]
mA
mA
fRXIFCLK = 45.056 MHz
fRXIFCLK = 20 MHz
VIH
(min)
High Level Input
Voltage
0.7VDD
VDD+.3
2.6
Volts
Logic ‘1’
VIL(min)
Low Level Input Voltage
VSS–.3
0.2VDD
1.5
Volts
Logic ‘0’
IIH (min)
High Level Input
Current
10
µA
All inputs, VIN = VDD
IIL (max)
Low Level Input Current
–10
µA
TXIFCLK, RXIFCLK,
/RESET only, VIN = VSS
IIL(max)
Low Level Input Current
–130
–15
–45
µA
All other inputs, VIN =
VSS
VOH(min)
High Level Output
Voltage
VDD–0.4
Volts
IO = –2.0 mA, all
outputs
VOL(max)
Low Level Output
Voltage
0.4
0.1
Volts
IO = +2.0 mA, all
outputs
IOS
Output Short Circuit
Current
20
130
65
mA
VOUT = VDD, VDD = max
C
Input Capacitance
2
pF
All inputs
COUT
Output Capacitance
4
pF
All outputs
Notes:
1. The operational supply current depends on how the Z87200 is configured.
Typical current consumption can be approximated as follows:
2. IDD=5xfRXIFCLK +13 x fCHIP mA,
3. where fRXIFCLK is the frequency of RXIFCLK and fCHIP is the PN chip rate,
both in MHz.



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