IP1001 datasheet(7/18 Pages) IRF

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iP1001

Table 2. Pin Description

Pin Nam e

Ball Designator

Pin Description

V IN

A 9-A 12, B9-B12, C 9-

C 14, D 9-D14, E 9-E 16,

F9-F16, G9-G 16

In put voltage conn ection n ode.

A1, A6-A7, A13-A15,

B1, B6-B7, B13-B16,

C3, C6-C 7, C15-C16,

D 3-D 4, D6, D 15-D 16

E 3-E6, F1-F5, G 1-G 5,

H1-H5, J1-J2, J6-J8,

K 6-K 8, L6-L8, M 6-M 8,

N 4-N 5, N7-N 8, P4-P5,

P7-P8, R6-R8, S6-S8

No electrical connection .

V SW

H9-H14, J11-J14, K 11-

K 14, L11-L14, N 11-

N 14, M 11-M 14, P11-

P14, R11-R14, S11-S14

Output inductor conn ection n ode.

PGND

H15-H16, J15-J16, K 9-

K 10, K15-K 16, L9-

L10, L15-L16, M 9-

M 10, M 15-M 16, N 9-

N 10, N15-N 16, P9-P10,

P15-P16, R9-R10, R15-

R16, S9-S10, S15-S16

Pow er groun d.

V DD

R4-R5, S4-S5

Control Power connection node

SGND

A2-A 3, B2-B3

Sign al groun d.

GNDS

Rem ote Groun d Sense Pin. Conn ect to PGND for

VOUT >2V

ENABLE

R3, S3

Com m an ds output O N or O FF. A ctive floatin g

(in tern ally pulled h igh). W h en logic low, th e

syn chron ous M O SFET is turn ed ON.

R2, S2

No electrical connection , intern ally pulled high,

m ust leave floating.

PGOOD

R1, S1

Internally pulled-up to V DD.

V F

C 1-C 2

Output voltage feed back local sen se.

V FS

D1-D 2

Output voltage rem ote sen se feedback sign al. For

greater than 2V OUT, disconn ect from rem ote load

an d conn ect to V F.

P1-P2

N1-N 2

M 1-M 2

L1-L2

K1-K 2

VID code settin g D /A inputs. Internally pulled high.

ILIM

A 5, B5, C 5

Current lim it thresh old setting pin. See ILIM curve

for extern al resistor values.

FRE Q

A 4, B4

Switch in g frequency selector pin. Floating selects

300kHz, tied to VDD selects 200kHz.

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