TPS65982ABZBHR datasheet(70/121 Pages) TI1

70 / 121 page

VIN_3V3 or VBUS

Application

Initialize

Configure I C

Dead Battery

Check

Load Appcode

Load from SPI

Flash

Download from

UART

SPI_MISO High

SPI_MISO Low

TPS65982

SLVSD02D – MARCH 2015 – REVISED JUNE 2019

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Device Functional Modes (continued)

Figure 63. Flow Diagram for Boot Code Sequence

9.4.2 Initialization

During initialization the TPS65982 enables device internal hardware and loads default configurations. The 48-

MHz clock is enabled and the TPS65982 persistence counters begin monitoring VBUS and VIN_3V3. These

counters ensure the supply powering the TPS65982 is stable before continuing the initialization process. The

initialization concludes by enabling the thermal monitoring blocks and thermal shutdown protection, along with

the ADC, CRC, GPIO and NVIC blocks.

9.4.3 I2C Configuration

The TPS65982 features dual I2C busses with configurable addresses. The I2C addresses are determined

according to the flow depicted in Figure 64. The address is configured by reading device GPIO states at boot

(refer to the I2C Pin Address Setting section for details). Once the I2C addresses are established the TPS65982

enables a limited host interface to allow for communication with the device during the boot process.

TPS65982ABZBHR Datasheet(PDF) 70 Page - Texas Instruments