UJA1069 datasheet(36/64 Pages) PHILIPS

36 / 64 page

UJA1069_2

Preliminary data sheet

Rev. 02 — 5 March 2007

36 of 64

NXP Semiconductors

UJA1069

LIN fail-safe system basis chip

6.12.12 Register conﬁgurations at reset

At Power-on, Start-up and Restart mode the setting of the SBC registers is predeﬁned.

[1]

Depends on history.

Read Only

read the register selected by RRS without writing to the

General Purpose register 1

read the register selected by RRS and write to the General

Purpose register

11 to 0

GP1[11:0]

General Purpose bits

user-deﬁned

Table 14.

General Purpose register 1 and General Purpose Feedback register 1 bit description …continued

Bit

Symbol

Description

Value

Function

Table 15.

System Status register: status at reset

Symbol

Name

Power-on

Start-up [1]

Restart [1]

RSS

Reset Source Status

0000 (power-on reset)

any value except 1100

0000 or 0010 or 1100 or 1110

LWS

LIN Wake-up Status

0 (no LIN wake-up)

1 if reset is caused by a

LIN wake-up, otherwise

no change

EWS

Edge Wake-up Status

0 (no edge detected)

1 if reset is caused by a

wake-up via pin WAKE,

otherwise no change

no change

WLS

WAKE Level Status

actual status

TWS

Temperature Warning

Status

0 (no warning)

actual status

SDMS

Software Development

Mode Status

actual status

ENS

Enable Status

0 (EN = LOW)

PWONS

Power-on Status

1 (power-on reset)

no change

Table 16.

System Diagnosis register: status at reset

Symbol

Name

Power-on

Start-up

Restart

LINFD

LIN Failure Diagnosis

00 (no failure)

actual status

V3D

V3 Diagnosis

1 (OK)

actual status

V1D

V1 Diagnosis

0 (fail)

actual status

Table 17.

Interrupt Enable register and Interrupt Enable Feedback register: status at reset

Symbol

Name

Power-on

Start-up

Restart

All

all bits

0 (interrupt disabled)

no change

Table 18.

Interrupt register: status at reset

Symbol

Name

Power-on

Start-up

Restart

All

all bits

0 (no interrupt)

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