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PSD4235G2 Datasheet(PDF) 13 Page - STMicroelectronics |
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PSD4235G2 Datasheet(HTML) 13 Page - STMicroelectronics |
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13 / 89 page ![]() 13/89 PSD4235G2 PE3 74 I/O CMOS or Open Drain PE3 pin of Port E. This port pin can be configured to have the following functions: 1. MCU I/O – standard output or input port. 2. Latched address output. 3. TDO output for the JTAG Serial Interface. PE4 75 I/O CMOS or Open Drain PE4 pin of Port E. This port pin can be configured to have the following functions: 1. MCU I/O – standard output or input port. 2. Latched address output. 3. TSTAT output for the JTAG Serial Interface. 4. Ready/Busy output for parallel In-System Programming (ISP). PE5 76 I/O CMOS or Open Drain PE5 pin of Port E. This port pin can be configured to have the following functions: 1. MCU I/O – standard output or input port. 2. Latched address output. 3. TERR active Low output for the JTAG Serial Interface. PE6 77 I/O CMOS or Open Drain PE6 pin of Port E. This port pin can be configured to have the following functions: 1. MCU I/O – standard output or input port. 2. Latched address output. 3. VSTBY – SRAM stand-by voltage input for SRAM battery backup. PE7 78 I/O CMOS or Open Drain PE7 pin of Port E. This port pin can be configured to have the following functions: 1. MCU I/O – standard output or input port. 2. Latched address output. 3. Battery-on Indicator (VBATON). Goes High when power is being drawn from the external battery. PF0-PF7 31-38 I/O CMOS or Open Drain These pins make up Port F. These port pins are configurable and can have the following functions: 1. MCU I/O – standard output or input port. 2. External Chip Select (ECS0-ECS7) outputs, or inputs to CPLD. 3. Latched address outputs. 4. Address A1-A3 inputs in 80C51XA mode (PF0 is grounded) 5. Data bus port (D0-D7) in a non-multiplexed bus configuration. 6. Peripheral I/O mode. 7. MCU reset mode. PG0-PG7 21-28 I/O CMOS or Open Drain These pins make up Port G. These port pins are configurable and can have the following functions: 1. MCU I/O – standard output or input port. 2. Latched address outputs. 3. Data bus port (D8-D15) in a non-multiplexed bus configuration. 4. MCU reset mode. VCC 9, 29, 69 Supply Voltage GND 8, 30, 49, 50, 70 Ground pins Pin Name Pin Type Description |
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