PSD4235G2 datasheet(47/89 Pages) STMICROELECTRONICS

47 / 89 page

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PSD4235G2

Figure 25. Interfacing the PSD with an MMC2001

MMC2001. The Motorola MCORE MMC2001

MCU has a MOD input pin that selects interal or

external boot ROM. The PSD can be configured

as the external flash boot ROM or as extension to

the internal ROM.

The MMC2001 has a 16-bit external data bus and

20 address lines with external chip select signals.

The Chip Select Control Registers allow the user

to customize the bus interface and timing to fit the

individual system requirement. A typical interface

configuaration to the PSD is shown in Figure 25.

The MMC2001’s R/W signal is conneced to the

CNTL0 pin, while EB0 and EB1 (enable byte-0 and

enable byte-1) are connected to the CNTL1 (UDS)

and CNTL2 (LDS) pins. The WEN bit in the Chip

Select Control Register should be set to 1 to termi-

nate the EB0-EB1 earlier to provide the wrtie data

hold time for the PSD. The WSC and WWS bits in

the Control Register are set to wait states that

meet the PSD access time requirement.

VCC_BAR

A16

ALE

AD14

AD10

AD6

A17

A19

RD\

AD13

AD9

AD5

AD1

RESET\

A19

BHE\

AD7

A[19:16]

A17

AD[15:0]

AD12

AD4

AD2

A18

WR\

AD15

AD8

A18

AD11

A16

RESET\

AD3

AD0

CRYSTAL

PSD

ADIO0

ADIO1

ADIO2

ADIO3

ADIO4

ADIO5

ADIO6

ADIO7

ADIO9

ADIO10

ADIO11

ADIO12

ADIO13

ADIO14

ADIO15

PF0

PF1

PF2

PF3

PF4

PF5

PF6

PF7

PG1

PG2

PG3

PG4

PG5

PG6

PG7

PA5

PA6

PA7

CNTL0(WR)

CNTL1(RD)

CNTL2(BHE)

PD0 (ALE)

RESET

ADIO8

PG0

PA3

PA4

PA2

PA0

PA1

PB0

PB1

PB2

PB3

PB4

PB5

PB6

PB7

PC0

PC1

PC2

PC3

PC4

PC5

PC6

PC7

PE0 (TMS)

PE1 (TCK/ST)

PE2 (TDI)

PE3 (TDO)

PE4 (TSTAT/RDY)

PE5 (TERR)

PE7 (VBATON)

PD2 (CSI)

PD1 (CLKIN)

PD3 (WRH)

PE6 (VSTBY)

Infineon C167CR

AD0

100

AD1

101

AD2

102

AD3

103

AD4

104

AD5

105

AD6

106

AD7

107

AD8

108

AD9

111

AD10

112

AD11

113

AD12

114

AD13

115

AD14

116

AD15

117

ALE

READY

WR/WRL

XTAL1

138

XTAL2

137

RSTIN

140

RSTOUT

141

NMI

142

P4.0/A16

A17

A18

A19

A20

A21

A22

P4.7/A23

P3.0/T0IN

P3.1/T6OUT

P3.2/CAPIN

P3.3/T3OUT

P3.4/T3EUD

P3.5/T4IN

P3.6/T3IN

P3.7/T2IN

P3.8/MRST

P3.9/MTSR

P3.10/TXD0

P3.11/RXD0

P3.12/BHE/WRH

P3.13/SCLK

P3.15/CLKOUT

P1L0

118

P1L1

119

P1L2

120

P1L3

121

P1L4

122

P1L5

123

P1L6

124

P1L7

125

P1H0

128

P1H1

129

P1H2

130

P1H3

131

P1H4

132

P1H5

133

P1H6

134

P1H7

135

P2.0/CC0IO

P2.1/CC1IO

P2.2/CC2IO

P2.3/CC3IO

P2.4/CC4IO

P2.5/CC5IO

P2.6/CC6IO

P2.7/CC7IO

P2.8/CC8IO/EX0IN

P2.9/CC9IO/EX1IN

P2.10/CC10IO/EX2IN

P2.11/CC11IO/EX3IN

P2.12/CC12IO/EX4IN

P2.13/CC13IO/EX5IN

P2.14/CC14IO/EX6IN

P2.15/CC15IO/EX7IN

P5.0/AN0

P5.1/AN1

P5.2/AN2

P5.3/AN3

P5.4/AN4

P5.5/AN5

P5.6/AN6

P5.7/AN7

P5.8/AN8

P5.9/AN9

P5.10/AN10/T6UED

P5.11/AN11/T5UED

P5.12/AN12/T6IN

P5.13/AN13/T5IN

P5.14/AN14/T4UED

P5.15/AN15/T2UED

P6.0/!CS0

P6.1/!CS1

P6.2/!CS2

P6.3/!CS3

P6.4/!CS4

P6.5/!HOLD

P6.6/!HLDA

P6.7/!BREQ

P7.0/POUT0

P7.1/POUT1

P7.2/POUT2

P7.3/POUT3

P7.4/CC28IO

P7.5/CC29IO

P7.6/CC30IO

P7.7/CC31IO

P8.0/CC16IO

P8.1/CC17IO

P8.2/CC18IO

P8.3/CC19IO

P8.4/CC20IO

P8.5/CC21IO

P8.6/CC22IO

P8.7/CC23IO

Vref

ADIO[15:0]

A[19:16]

AI04954b

PSD4235G2 Datasheet(PDF) 47 Page - STMicroelectronics

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