SPEAR1340 datasheet(101/200 Pages) STMICROELECTRONICS

101 / 200 page

SPEAr1340

Pin description

Doc ID 023063 Rev 4

101/200

DDR_CS1n

Memory chip select 1 (active low)

DDR_BA0

Memory bank address

DDR_BA1

DDR_BA2

AA1

DDR_CKE

Memory clock enable (active high)

DDR_ODT0

Memory ODT signal

AC3

DDR_ODT1

DDR_DM0

Memory data mask (active high)

AE5

DDR_DM1

AG3

DDR_DM2

AF10

DDR_DM3

AG8

DDR_DQS0p

Differential memory data strobe active high; drove during write transaction

and received from memory device during read during transfer

AE3

DDR_DQS1p

AH4

DDR_DQS2p

AE9

DDR_DQS3p

AH10

DDR_DQS0n

Differential memory data strobe active low; drove during write transaction

and received from memory device during read during transfer

AF3

DDR_DQS1n

AG4

DDR_DQS2n

AF8

DDR_DQS3n

AG9

DDR_DQ0

Memory data bus

AF2

DDR_DQ1

AF4

DDR_DQ2

AF1

DDR_DQ3

AF5

DDR_DQ4

AE1

DDR_DQ5

AE6

DDR_DQ6

AE2

DDR_DQ7

AE4

DDR_DQ8

AH3

DDR_DQ9

AH2

DDR_DQ10

AH6

DDR_DQ11

AG1

DDR_DQ12

AG5

DDR_DQ13

AG2

Table 10.

Memories - MPMC signals description (continued)

Signal name

Description

Type

Ball

SPEAR1340 Datasheet(PDF) 101 Page - STMicroelectronics

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