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SPEAR1340 Datasheet(PDF) 104 Page - STMicroelectronics

Part # SPEAR1340
Description  Dual-core Cortex A9 HMI embedded MPU
PDF  200 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR1340 Datasheet(HTML) 104 Page - STMicroelectronics

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Pin description
SPEAr1340
104/200
Doc ID 023063 Rev 4
FSMC_AD21
Address bus
O
A21
FSMC_AD22
B21
FSMC_AD23
C21
FSMC_AD24
D21
FSMC_AD25
D22
FSMC_CE0n(1)
NAND/NOR/SRAM chip select (default NAND)
O
C6
FSMC_CE1n
D11
FSMC_WEn
Write enable
O
E8
FSMC_REn
Read enable
O
D8
FSMC_ALE_AD17
Address latch enable /address pin #17
O
C8
FSMC_CLE_AD16
Command latch enable / address pin #16
O
E7
FSMC_RB0
NAND ready/busy[0] or NOR address valid or SRAM byte lane[0] (valid
only for 16-bit configuration)
IO
D7
FSMC_RSTPWDWN1 NAND ready/busy[1] or NOR reset power down[1]
IO
A10
FSMC_RWPRT0n
NAND/NOR write protect [0] or SRAM byte lane[1] (valid only for 16-bit
configuration)
O
C7
FSMC_RWPRT1n
NAND/NOR write protect [1]
E11
FSMC_RSTPWDWN0 NOR reset / Power down [0]
O
E10
1.
FSMC_CE0n is used for booting from Parallel NOR or NAND Flash.
Table 11.
Memories - FSMC signals description (continued)
Signal name
Description
Type
Ball
Table 12.
Memories - SMI signals description
Signal name
Description
Type
Ball
SMI_DATAIN
Data in from external serial Flash
I
AB25
SMI_DATAOUT
Data out to external serial Flash
O
AB24
SMI_CLK
Data out clock to external Flash
O
AB28
SMI_CS0n(1)
Chip selects (active low)
O
AA27
SMI_CS1n
AB26
1.
SMI_CS0n is used for booting from Serial NOR.



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