| Electronic Components Datasheet Search |
|
JS28F512P30TFA Datasheet(PDF) 69 Page - Micron Technology |
|
|
|||||||||||||||||||||||||||||
JS28F512P30TFA Datasheet(HTML) 69 Page - Micron Technology |
|
69 / 86 page ![]() Datasheet Sept 2012 69 Order Number:208042-0 6 P30-65nm Table 40: Partition Region 1 Information (Sheet 2 of 2 Offset P=10Ah Description (Optional flash features and commands) Len Addr. (P+2C)h Partition Region 1 Erase Block Type 1 Information 4 136: (P+2D)h bits 0-15 = y, y+1 = # identical-size erase blks in a partition 137: (P+2E)h bits 16-31 = z, region erase block(s) size are z x 256 bytes 138: (P+2F)h 139: (P+30)h Partition 1 (Erase Block Type 1) 213A: (P+31)h Block erase cycles x 1000 13B: (P+32)h Partition 1 (erase block Type 1) bits per cell; internal EDAC 1 13C: bits 0-3 = bits per cell in erase region bit 4 = internal EDAC used (1=yes, 0=no) bits 5-7 = reserve for future use (P+33)h Partition 1 (erase block Type 1) page mode and synchronous mode capabilities defined in Table 10 113D: bit 0 = page-mode host reads permitted (1=yes, 0=no) bit 1 = synchronous host reads permitted (1=yes, 0=no) bit 2 = synchronous host w rites permitted (1=yes, 0=no) bits 3-7 = reserved for future use (P+34)h Partition Region 1 (Erase Block Type 1) Programming Region Information bits 0-7 = x, 2^x = Programming Region aligned size (bytes) 613E: (P+35)h bits 8-14 = Reserved; bit 15 = Legacy flash operation (ignore 0:7) 13F: (P+36)h bits 16-23 = y = Control Mode valid size in bytes 140: (P+37)h bits 24-31 = Reserved 141: (P+38)h bits 32-39 = z = Control Mode invalid size in bytes 142: (P+39)h bits 40-46 = Reserved; bit 47 = Legacy flash operation (ignore 23:16 & 39:32) 143: (P+3A)h Partition Region 1 Erase Block Type 2 Information 4 144: (P+3B)h bits 0-15 = y, y+1 = # identical-size erase blks in a partition 145: (P+3C)h bits 16-31 = z, region erase block(s) size are z x 256 bytes 146: (P+3D)h 147: (P+3E)h Partition 1 (Erase Block Type 2) 2 148: (P+3F)h Block erase cycles x 1000 149: (P+40)h Partition 1 (erase block Type 2) bits per cell; internal EDAC 1 14A: bits 0-3 = bits per cell in erase region bit 4 = internal EDAC used (1=yes, 0=no) bits 5-7 = reserve for future use (P+41)h Partition 1 (erase block Type 2) page mode and synchronous mode capabilities defined in Table 10 114B: bit 0 = page-mode host reads permitted (1=yes, 0=no) bit 1 = synchronous host reads permitted (1=yes, 0=no) bit 2 = synchronous host w rites permitte (P+42)h (P+43)h (P+44)h (P+45)h Partition Region 1 (Erase Block Type 2) Programming Region Information bits 0-7 = x, 2^x = Programming Region aligned size (bytes) bits 8-14 = Reserved; bit 15 = Legacy flash operation (ignore 0:7) bits 16-23 = y = Control Mode valid size in bytes bits 24-31 = Reserved bits 32-39 = z = Control Mode invalid size in bytes bits 40-46 = Reserved; bit 47 = Legacy flash operation (ignore 23:16 & 39:32) 6 14C: 14D: 14E: 14E: 150: 151: |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |