JS28F512P30TFA datasheet(30/86 Pages) MICRON

30 / 86 page

P30-65nm

Datasheet

Sept 2012

Order Number: 208042-0

any errors, and then cleared. If the Blank Check operation fails, which means the block

is not completely erased, the Status Register bit SR.5 will be set (“1”). CE# or OE#

toggle (during polling) updates the Status Register.

After examining the Status Register, it should be cleared by the Clear Status Register

command before issuing a new command. The device remains in Status Register Mode

until another command is written to the device. Any command can follow once the

Blank Check command is complete.

9.3

Erase Suspend

Issuing the Erase Suspend command while erasing suspends the block erase operation.

This allows data to be accessed from memory locations other than the one being

erased. The Erase Suspend command can be issued to any device address. A block

erase operation can be suspended to perform a word or buffer program operation, or a

read operation within any block except the block that is erase suspended (see

Figure 36, “Erase Suspend/Resume Flowchart” on page 78).

When a block erase operation is executing, issuing the Erase Suspend command

requests the WSM to suspend the erase algorithm at predetermined points. The device

continues to output Status Register data after the Erase Suspend command is issued.

Block erase is suspended when Status Register bits SR[7,6] are set. Suspend latency is

specified in Section 15.5, “Program and Erase Characteristics” on page 59.

To read data from the device (other than an erase-suspended block), the Read Array

command must be issued. During Erase Suspend, a Program command can be issued

to any block other than the erase-suspended block. Block erase cannot resume until

program operations initiated during erase suspend complete. Read Array, Read Status

during Erase Suspend. Additionally, Clear Status Register, Program, Program Suspend,

Block Lock, Block Unlock, and Block Lock-Down are valid commands during Erase

Suspend.

During an erase suspend, deasserting CE# places the device in standby, reducing

active current. VPP must remain at a valid level, and WP# must remain unchanged

while in erase suspend. If RST# is asserted, the device is reset.

9.4

Erase Resume

The Erase Resume command instructs the device to continue erasing, and

automatically clears SR[7,6]. This command can be written to any address. If Status

instruction. RST# must remain deasserted.

9.5

Erase Protection

When VPP = VIL, absolute hardware erase protection is provided for all device blocks. If

VPP is at or below VPPLK, erase operations halt and SR.3 is set indicating a VPP-level

error.

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