AD9920ABBCZ datasheet(41/112 Pages) AD

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AD9920A

Rev. B | Page 41 of 112

Vertical Masking Using the FREEZE/RESUME Registers

As shown in Figure 51 and Figure 52, the FREEZE/RESUME

registers are used to temporarily mask the V-outputs. The pixel

locations to begin the masking (FREEZE) and end the masking

(RESUME) create an area in which the vertical toggle positions

are ignored. At the pixel location specified in the FREEZE register,

the V-outputs are held static at their current dc state, high or low.

The V-outputs are held until the pixel location specified by the

RESUME register is reached, at which point the signals continue

with any remaining toggle positions, if any exist.

Four sets of FREEZE/RESUME registers are provided, allowing

the vertical outputs to be interrupted up to four times in the

same line.

When masking is enabled, each group (Group A, Group B,

Group C, and Group D) uses the same FREEZE/RESUME

positions.

Note that the FREEZE/RESUME registers are also used as the

VALTSEL0 and VALTSEL1 registers during special vertical

alternation mode (see the Special Vertical Sequence Alternation

(SVSA) Mode section).

XV1

XV24

NO MASKING AREA

Figure 51. No FREEZE/RESUME

XV1

XV24

V-MASKING AREA

FREEZE

RESUME

NOTES

1. ALL TOGGLE POSITIONS WITHIN THE FREEZE/RESUME MASKING AREA ARE IGNORED. H-COUNTER CONTINUES TO COUNT DURING MASKING.

2. FOUR SEPARATE MASKING AREAS ARE AVAILABLE, USING FREEZE1/RESUME1, FREEZE2/RESUME2, FREEZE3/RESUME3, AND

FREEZE4/RESUME4 REGISTERS.

Figure 52. Using FREEZE/RESUME

AD9920ABBCZ Datasheet(PDF) 41 Page - Analog Devices