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AD9920ABBCZ Datasheet(PDF) 44 Page - Analog Devices |
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AD9920ABBCZ Datasheet(HTML) 44 Page - Analog Devices |
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44 / 112 page ![]() AD9920A Rev. B | Page 44 of 112 Sequence Line Alternation To support the timing requirements of some advanced CCDs in a memory-efficient manner, the AD9920A can automatically increment the sequence number at the end of a given line through the use of the SEQ_ALT_INC register (V-Sequence Register 0x09, Bit 20). It can also reset the sequence number to the sequence defined in the field register through the SEQ_ALT_RST register (V-Sequence Register 0x09, Bit 21). Combining these two registers allows the user to create a loop of sequences for a given region. See Figure 56 for an example of how to use these two functions together. The example in Figure 56 uses the register settings listed in Table 18. With these settings, at Sequence Change Position 0 (SCP0), the AD9920A steps into Sequence 2. Because the Sequence 2 SEQ_ALT_INC = 1 and the SEQ_ALT_RST = 0, at the end of that line the sequence number automatically increments to Sequence 3. In the same way, at the end of that line, the sequence number automatically increments to Sequence 4. Because SEQ_ALT_INC = 0 and SEQ_ALT_RST = 1 for Sequence 4, the AD9920A automatically resets the sequence number to the sequence defined for that region in the field register, which in this case is Sequence 2. The AD9920A continues to loop in this fashion between Sequence 2, Sequence 3, and Sequence 4 until it reaches the next sequence change position. It is important to note that the sequence number can increment only at the end of a line and cannot be used to create more complex patterns within one line. This is distinctly different from the special vertical sequence alternation mode, which allows the user to concatenate multiple sequences within one line (see the Special Vertical Sequence Alternation (SVSA) Mode section). Table 18. Register Settings for the Example in Figure 56 Field Registers Sequence 2 Registers Sequence 3 Registers Sequence 4 Registers Sequence 6 Registers SCP0 = 0, SEQ0 = 2 SEQ_ALT_INC = 1 SEQ_ALT_INC = 1 SEQ_ALT_INC = 0 SEQ_ALT_INC = 0 SCP1 = 6, SEQ1 = 6 SEQ_ALT_RST = 0 SEQ_ALT_RST = 0 SEQ_ALT_RST = 1 SEQ_ALT_RST = 0 VD HD SCP1 ACTIVE SEQUENCE # 234 2 3 4 6 6 SCP0 Figure 56. Example Output Using SEQ_ALT_INC and SEQ_ALT_RST Functions |
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