MRF39RA datasheet(33/72 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS40001778B-page 33

MRF39RA

4.5

Packet Mode

4.5.1

GENERAL DESCRIPTION

In Packet mode the NRZ data from the demodulator is

not directly accessed by the uC, but stored in the FIFO

and accessed via the SPI interface.

In addition, the MRF39RA packet handler performs

several packet-oriented tasks such as preamble and

sync word check, CRC check, de-whitening of data,

Manchester

decoding,

address

filtering,

AES

decryption, etc. This simplifies software and reduces

uC overhead by performing these repetitive tasks

within the RF chip itself.

Another important feature is ability to empty the FIFO in

Sleep/Standby mode, ensuring optimum power

consumption and adding more flexibility for the

software.

FIGURE 4-8:

PACKET MODE CONCEPTUAL VIEW

CONTROL

SPI

PACKET

HANDLER

SYNC

RECOG.

DIO1

MISO

MOSI

SCK

NSS

Data

FIFO

(+SR)

DIO2

DIO0

DIO3

DIO4

DIO5

Note:

The bit synchronizer is automatically

enabled in Packet mode.

MRF39RA Datasheet(PDF) 33 Page - Microchip Technology

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