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TNETV1647GSTZWT Datasheet(PDF) 113 Page - Texas Instruments |
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TNETV1647GSTZWT Datasheet(HTML) 113 Page - Texas Instruments |
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113 / 236 page ![]() CLKOUT0 (Divide-by-1) 1 2 4 4 CLKIN/MXI CLKOUT0 (Divide-by-2) 5 6 7 8 3 TMS320DM6441 www.ti.com SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010 Table 6-18. Switching Characteristics Over Recommended Operating Conditions for CLK_OUT0(1) (2) (see Figure 6-16) 1.05 V and 1.2 V NO. PARAMETER UNIT MIN MAX 1 tC Cycle time, CLK_OUT0 37.037 74.074 ns 2 tw(CLKOUT0H) Pulse duration, CLK_OUT0 high 0.45P 0.55P ns 3 tw(CLKOUT0L) Pulse duration, CLK_OUT0 low 0.45P 0.55P ns 4 tt(CLKOUT0) Transition time, CLK_OUT0 0.05P ns Delay time, CLKIN/MXI high to CLK_OUT0 high 5 td(CLKINH-CLKO0H) 1 8 ns (divide-by-1 only) Delay time, CLKIN/MXI low to CLK_OUT0 low 6 td(CLKINL-CLKO0L) 1 8 ns (divide-by-1 only) Delay time, CLKIN/MXI high to CLK_OUT0 low 7 td(CLKINH-CLKO0L) 1 8 ns (divide-by-2 only) Delay time, CLKIN/MXI high to CLK_OUT0 high 8 td(CLKINH-CLKO0H) 1 8 ns (divide-by-2 only) (1) The reference points for the rise and fall transitions are measured at VOL MAX and VOH MIN. (2) P = 1/CLK_OUT0 clock frequency in nanoseconds (ns). For example, when CLK_OUT0 frequency is 27 MHz, use P = 37.04 ns. Figure 6-16. CLK_OUT0 Timing Copyright © 2006–2010, Texas Instruments Incorporated Peripheral and Electrical Specifications 113 Submit Documentation Feedback Product Folder Link(s): TMS320DM6441 |
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