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SST26VF032BEUI Datasheet(PDF) 32 Page - Microchip Technology |
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SST26VF032BEUI Datasheet(HTML) 32 Page - Microchip Technology |
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32 / 76 page ![]() SST26VF032BEUI DS20006152A-page 32 2019 Microchip Technology Inc. 5.31 Write-Enable (WREN) The Write Enable (WREN) instruction sets the Write- Enable-Latch bit in the Status register to ‘1,’ allowing Write operations to occur. The WREN instruction must be executed prior to any of the following operations: Sector Erase, Block Erase, Chip Erase, Page Program, Program Security ID, Lockout Security ID, Write Block- Protection Register, Lock-Down Block-Protection Reg- ister, Non-Volatile Write-Lock Lock-Down Register, SPI Quad Page program, and Write-Status Register. To execute a Write Enable the host drives CE# low then sends the Write Enable command cycle (06H) then drives CE# high. See Figures 5-32 and 5-33 for the WREN instruction sequence. FIGURE 5-32: WRITE-ENABLE SEQUENCE (SQI) FIGURE 5-33: WRITE-ENABLE SEQUENCE (SPI) 20005218 F12.1 MODE 3 0 1 SCK SIO[3:0] CE# 06 MODE 0 CE# SO SI SCK 01 2 3 4 5 6 7 06 HIGH IMPEDANCE MODE 0 MODE 3 20005218 F18.0 MSB |
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