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SST26VF032BEUI Datasheet(PDF) 63 Page - Microchip Technology |
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SST26VF032BEUI Datasheet(HTML) 63 Page - Microchip Technology |
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63 / 76 page ![]() 2019 Microchip Technology Inc. DS20006152A-page 63 SST26VF032BEUI SST26VF032BEUI (Vendor) Parameter Table SST26VF032BEUI Identification 200H A7:A0 BFH Manufacturer ID 201H A15:A8 26H Memory Type 202H A23:A16 42H Device ID SST26VF032BEUI=42H 203H A31:A24 FFH Reserved. Bits default to all 1’s. SST26VF032BEUI Interface 204H A2:A0 B9H Interfaces Supported 000: SPI only 001: Power up default is SPI; Quad can be enabled/disabled 010: Reserved : : 111: Reserved A3 Supports Enable Quad 0: not supported 1: supported A6:A4 Supports Hold#/Reset# Function 000: Hold# 001: Reset# 010: HOLD/Reset# 011: Hold# & I/O when in SQI(4-4-4), 1-4-4 or 1-1-4 Read A7 Supports Software Reset 0: not supported 1: supported 205H A8 5FH Supports Quad Reset 0: not supported 1: supported A10:A9 Reserved. Bits default to all 1’s A13:A11 Byte-Program or Page-Program (256 Bytes) 011: Byte Program/Page Program in SPI and Quad Page Program once Quad is enabled A14 Program-Erase Suspend Supported 0: Not Supported 1: Program/Erase Suspend Supported A15 Deep Power-Down Mode Supported 0: Not Supported 1: Deep Power-Down Mode Supported TABLE 11-1: SERIAL FLASH DISCOVERABLE PARAMETER (SFDP) (CONTINUED) (11 OF 16) Address Bit Address Data Comments |
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