ADAR4002ACPZ-R7 datasheet(10/66 Pages) AD

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Data Sheet

ADAR4002

SPECIFICATIONS

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SPI BLOCK WRITE MODE

Data can be written to and read from the SPI registers in block write or read modes, where the register address automatically increments (given

Bit 5 and Bit 2 are asserted high in Register 0x00). Data for consecutive registers can be written or read without sending new address bits.

During the transaction, the rising edge of CLK_IN during the final bit (D0) of the register triggers the data to load into the register. Data writing or

reading can be continued indefinitely until CSB/CLKO is raised again, ending the write or read process.

Figure 6. Timing Diagram for SPI Block Write Mode

SHORT CONTROL COMMAND

The short control command is a quick and efficient 6-bit SPI transaction used for eight different commands. The first two bits clocked in must

be 0b11 to initiate a short control command. Each command is given with a 3-bit command code within the SPI transaction. After the 3-bit

command code, a final don't care bit must be clocked in. Table 4 outline the various commands and their unique command code bits. The same

commands are available via the normal 24-bit SPI transaction; however, these shorter versions allow much faster operation. The active edge of

a short control command is the CSB/CLKO rising edge, which completes the command. Timing is shown in Figure 7, wherein the don't care bit

is shown as a zero.

Figure 7. Short Control Command

Table 4. Short Control Commands

Short Control Command

Control Command Bits [CC2:CC0]

Description

Switch to Sequencer B

0 0 0

Sources the TDU/DSA data from Sequencer B. In addition, sets Bit 0 = 1 in Register 0x16.

Switch to Sequencer A

0 0 1

Sources the TDU/DSA data from Sequencer A. In addition, sets Bit 0 = 0 in Register 0x16.

Reset Sequencer A

0 1 0

Resets Sequencer A to its start position. In addition, sets Bit 3 in Register 0x15.

Reset Sequencer B

0 1 1

Resets Sequencer B to its start position. In addition, sets Bit 0 in Register 0x15.

Toggle Sequencer A Direction

1 0 0

Changes Sequencer A ascending/descending direction. In addition, sets Bit 3 in Register 0x14.

Toggle Sequencer B Direction

1 0 1

Changes Sequencer B ascending/descending direction. In addition, sets Bit 0 in Register 0x14.

Data Load Command

1 1 0

Loads all 32 TDU and DSA state data from the first rank registers to the second rank registers.

Update Command

1 1 1

Advances sequencer while in SPI mode.

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