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PCF88331 Datasheet(PDF) 60 Page - NXP Semiconductors |
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PCF88331 Datasheet(HTML) 60 Page - NXP Semiconductors |
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60 / 112 page ![]() 2003 Feb 14 60 Philips Semiconductors Objective specification STN RGB - 132 × 132 × 3 driver PCF8833 6.2.46 READBACK The PCF8833 can be identified when the readback commands (RDID1, RDID2 and RDID3) are sent via the interface. When the readback command is sent, the PCF8833 will send back an 8-bit number. Depending on the SCLK speed the readback bit D7 might get corrupted. When the speed is reduced to at least half of the specified maximum speed, at least for the D7 bit, the transferred bit is valid. ID1 is the manufacture ID and is hardwired in the PCF8833. ID2 is the version ID and is programmed in the module maker OTP cells; see Chapter 15. ID3 is the module ID and is programmed in the module maker OTP cells; see Chapter 15. Table 76 RDID1 data format Table 77 RDID2 data format; note 1 Note 1. X = don’t care. Table 78 RDID3 data format; note 1 Note 1. X = don’t care. 6.2.47 ENABLE OR DISABLE FACTORY DEFAULTS (SFD) The Enable or disable factory defaults (SFD) command will enable or disable the factory defaults stored in the MMOTP cells; see Section 15.2. These factory defaults can be set by the module maker. If the OTP bit EFD (enable factory defaults) has been set, these values can not be changed via the interface and the SFD command will have no effect. Otherwise, the data specified by commands will only be used if SFD is set to logic 0. The reset state of the SFD is defined in Table 80. Table 79 Enable/disable factory defaults register bits SYMBOL D/C 7 6543210 DEFAULT (S)DIN 0 1 1 0 1 1 0 1 0 DAH (S)DOUT − 01000101 45H SYMBOL D/C 7 6543210 DEFAULT (S)DIN 0 1 1 0 1 1 0 1 1 DBH (S)DOUT − XXXXXXXX 80H SYMBOL D/C 7 6543210 DEFAULT (S)DIN 0 1 1 0 1 1 1 0 0 DCH (S)DOUT − XXXXXXXX 03H D/C 76543210 DEFAULT 01110111 SFD EFH |
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