SPC564A80L7 datasheet(77/157 Pages) STMICROELECTRONICS

77 / 157 page

SPC564A74L7, SPC564A80B4, SPC564A80L7

Pinout and signal description

Doc ID 15399 Rev 9

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BOOTCFG[0:1]

SIU - Configuration

Two BOOTCFG signals are implemented in SPC564A80

MCUs.

The BAM program uses the BOOTCFG0 bit to determine

where to read the reset configuration word, and whether to

initiate a FlexCAN or eSCI boot.

The BOOTCFG1 pin is sampled during the assertion of the

RSTOUT signal, and the value is used to update the RSR and

the BAM boot mode

See the SPC564A80 Microcontroller Reference Manual for

more information.

The following values are for BOOTCFG[0:1}:

00:Boot from internal flash memory

01:FlexCAN/eSCI boot

10:Boot from external memory using EBI

11:Reserved

Note: For the 176-pin QFP and 208-ball BGA packages

BOOTCFG[0] is always 0 since the EBI interface is not

available.

WKPCFG

SIU - Configuration

The WKPCFG pin is applied at the assertion of the internal

reset signal (assertion of RSTOUT), and is sampled 4 clock

cycles before the negation of the RSTOUT pin.

The value is used to configure whether the eTPU and eMIOS

pins are connected to internal weak pull up or weak pull down

devices after reset. The value latched on the WKPCFG pin at

reset is stored in the Reset Status Register (RSR), and is

updated for all reset sources except the Debug Port Reset and

Software External Reset.

0:Weak pulldown applied to eTPU and eMIOS pins at reset

1:Weak pullup applied to eTPU and eMIOS pins at reset.

ETRIG[2:3]

SIU - eQADC Triggers

External signal eTRIGx triggers eQADC CFIFOx

GPIO[206] ETRIG0

(Input)

SIU - eQADC Triggers

External signal eTRIGx triggers eQADC CFIFOx

GPIO[207] ETRIG1

(Input)

SIU - eQADC Triggers

External signal eTRIGx triggers eQADC CFIFOx

Table 6.

Signal details (continued)

Signal

Module or Function

Description

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